Duty Correction Circuit With Feedback Delay Control for Stable Clocks
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Solution Overview
Problem
Existing duty correction circuits in semiconductor apparatuses face challenges in maintaining a constant duty cycle of internal clock signals, leading to performance issues and difficulty in detecting deviations from the target duty cycle range, which affects synchronization and operation stability.
Innovation Solution
A duty correction circuit comprising a first delay circuit, a second delay circuit, a bang-bang driver, a duty detection circuit, and a delay control circuit, which generates and adjusts internal clock signals to maintain a constant duty cycle by detecting duty cycles and controlling delays based on locking and duty detection signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a duty correction circuit uses existing correction methods, then the duty cycle can be adjusted, but the circuit cannot maintain a constant duty cycle due to banging phenomena and detection difficulties
Solution Approach 1:
The duty correction circuit is divided into multiple functional modules: a duty detection circuit that detects duty cycle deviations, a delay control circuit that generates control signals based on detection results, and delay circuits that adjust clock signals. This segmentation allows each module to perform its function independently, improving duty cycle stability without creating a monolithic complex circuit.
Solution Approach 2:
The duty detection circuit continuously monitors the duty cycle of internal clock signals and provides feedback to the delay control circuit. When a duty cycle deviation is detected, the feedback mechanism triggers corrective action by the delay control circuit to adjust the clock signal timing, thereby maintaining a constant duty cycle and preventing banging phenomena.
2Manufacturing precision
If the circuit continuously adjusts delay to correct duty cycle, then duty cycle accuracy improves, but detection precision decreases due to inability to detect deviations accurately
Solution Approach 1:
The duty detection circuit acts as an intermediary between the clock signal and the delay control circuit. It specifically detects duty cycle deviations by comparing clock signal edges and generates appropriate detection signals only when deviations are present, enabling accurate measurement without interfering with the precision of delay adjustments made by the control circuit.
3Adaptability or versatility
If multiple delay circuits are used to generate different internal clock signals, then synchronization capability improves, but the system becomes more complex and harder to control
Solution Approach 1:
The delay control circuit is designed with multi-functionality, serving as both a duty cycle corrector and a synchronization controller. It receives duty detection signals from the detection circuit and generates appropriate delay control signals to adjust multiple internal clock signals simultaneously, enabling synchronization across different clock domains without requiring separate control mechanisms for each clock signal.
Data Source
AI summary
A duty correction circuit comprises a first delay circuit, a second delay circuit, a bang-bang driver, a duty detection circuit, and a delay control circuit. The first delay circuit delays an input clock signal to generate a first delayed clock signal. The second delay circuit delays the input clock signal based on a delay control signal to generate a second delayed clock signal. The bang-bang driver generates first and second driving clock signals from the first and second delayed clock signals based on a locking signal and a duty detection signal. The duty detection circuit may detect duty cycles of the first and second driving clock signals and generate the duty detection signal. The delay control circuit may generate the delay control signal and the locking signal based on the duty detection signal.