Variable Duty-Cycle Clock Circuit Using Capacitor Charging
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Solution Overview
Problem
Existing technologies face challenges in generating a clock signal with a variable duty cycle, particularly in the automotive sector where high precision and low clock frequencies are required, often necessitating high-speed digital parts or complex analog signal conversion.
Innovation Solution
A circuit using two capacitors, one charged by an input signal and the other by its inverted signal, with a comparator and bistable multivibrator to generate an output signal with a variable duty cycle, allowing for precise pulse duration control without requiring high-speed basic clocks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a much faster basic clock is used for the digital part to achieve precise duty cycle control, then the duty cycle precision is improved, but the demands on the digital part and circuit complexity increase significantly
Solution Approach 1:
The patent replaces the digital clock-based duty cycle generation with an analog charging mechanism. Instead of using a high-speed digital clock to count time intervals, the invention uses capacitors charging through current sources to naturally generate time-proportional voltages. The analog voltage comparison directly determines the duty cycle, eliminating the need for high-frequency digital operation while maintaining precision.
Solution Approach 2:
The patent changes the fundamental parameter for duty cycle control from digital clock frequency to analog voltage levels. By controlling the charging currents (I1, I2) and capacitor values (C1, C2), the duty cycle can be precisely adjusted without requiring high-speed digital operation. The duty cycle becomes a function of voltage ratios rather than frequency ratios.
2Adaptability or versatility
If functions are shifted from digital to analog part to enable variable duty cycle generation, then the adaptability is improved, but the device complexity increases due to fast D/A converter and comparator requirements
Solution Approach 1:
The patent extracts the duty cycle control function from the digital domain and implements it entirely in the analog domain. The key insight is to generate the duty cycle-determining voltage directly through analog capacitor charging, rather than converting from digital. This removes the need for fast D/A converters and complex timing circuits, leaving only a simple voltage comparator.
Solution Approach 2:
The analog circuit components (capacitors, current sources) naturally perform the time-measurement function through their physical charging characteristics. The capacitors self-charge at rates proportional to the applied currents, automatically generating voltages that represent time intervals without requiring external digital control or conversion mechanisms.
3Measurement precision
If a high basic clock rate is used to achieve arbitrary duty cycle values, then the measurement precision is improved, but the productivity decreases due to unavailable high clock rates
Solution Approach 1:
The patent substitutes the mechanical/digital clock mechanism with an analog time-base generated by capacitor charging. The charging process naturally provides continuous, arbitrary time measurements without requiring a predefined clock rate. This enables duty cycle generation at any frequency without being constrained by available high-speed clock sources.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables the generation of arbitrary and precise pulse duty factors with a simple circuit, suitable for low clock frequencies, reducing the complexity and cost associated with high-speed digital parts and analog signal conversion.
Implementation Method 1
a first capacitor (C1) which is connected to a first charge source (I1) via a first switch (S1)
Implementation Method 2
a second capacitor (C2) which is connected to a second charge source (I2) via a second switch (S2)
Implementation Method 3
a comparator (110) which compares the two voltages U1 and U2 with one another
Data Source
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AI summary
A circuit for producing an output signal (CLK_OUT) with a second duty ratio from an input signal (CLK_IN) with a first duty ratio is described, wherein the circuit (100) has a first capacitor (C1) and a second capacitor (C2), which are respectively connected to a charge source (I1, I2) for periodically charging the capacitors (C1, C2), and wherein a voltage across the charged first capacitor (C1) is defined as a reference voltage and wherein the duty ratio of the output signal (CLK_OUT) is defined by the charging period of the second capacitor (C2) before the reference voltage is reached.