Duty Cycle-Controlled Load Switch for Low Channel Resistance
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Solution Overview
Problem
Load switches using pMOS transistors avoid the need for a charge pump but have higher channel resistance, while those using nMOS transistors require a charge pump, increasing complexity and power consumption, thus compromising power efficiency.
Innovation Solution
A load switch employing an nMOS power transistor with a charge pump, oscillator, and duty cycle controller that duty cycles the charge pump and driver circuits to maintain low channel resistance and reduce quiescent current, thereby improving power efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a pMOS transistor is used as the active switching device, then the need for a charge pump circuit is eliminated, but the channel resistance increases
Solution Approach 1:
The charge pump circuit is duty-cycled to operate periodically rather than continuously. The duty cycle controller activates the charge pump only when needed to maintain the gate voltage above the input voltage, reducing the average current consumption while ensuring the nMOS transistor maintains low channel resistance when conducting
2Reliability
If an nMOS transistor is used as the active switching device, then the channel resistance decreases, but a charge pump circuit is required which increases power consumption
Solution Approach 1:
The charge pump operates in periodic pulses controlled by the duty cycle controller, which monitors the gate voltage and activates the charge pump only when the gate voltage drops below the input voltage threshold. This periodic operation dramatically reduces the average power consumption compared to continuous operation
Solution Approach 2:
The duty cycle controller automatically monitors the gate voltage and controls the charge pump activation based on the actual voltage conditions. The system self-regulates to maintain proper nMOS transistor operation without external intervention, activating the charge pump only when the gate voltage sags below the required threshold
3Reliability
If the charge pump operates continuously, then the gate voltage is maintained above the input voltage, but the quiescent current increases
Solution Approach 1:
The duty cycle controller implements feedback by continuously monitoring the gate voltage and comparing it to the input voltage. When the gate voltage drops below the input voltage, the controller activates the charge pump to restore the voltage. This feedback mechanism ensures reliable gate voltage control while minimizing charge pump operation time
Solution Approach 2:
The charge pump is activated in periodic pulses rather than continuously. The duty cycle controller generates pulsed enable signals that activate the charge pump only during brief intervals when the gate voltage sags below the input voltage, dramatically reducing the average quiescent current while maintaining proper voltage control
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves a 90% reduction in average quiescent current and maintains low channel resistance, enhancing power efficiency and reducing power consumption by duty cycling the charge pump and driver circuits.
Implementation Method 1
a charge pump coupled to the power transistor and including an enable input to cause the charge pump to be turned on and off
Implementation Method 2
The duty cycle controller is coupled to the charge pump and is configured to duty cycle the charge pump based on a comparison of a signal of a gate of the power transistor to a reference signal
Implementation Method 3
An apparatus includes a load and a power transistor coupled to the load and configured to switch an input voltage to the load to power the load
Data Source
AI summary
A switch includes a power transistor configured to switch an input voltage to a load. The switch further includes a charge pump and a duty cycle controller. The charge pump is coupled to the power transistor and includes an enable input to cause the charge pump to be turned on and off. The duty cycle controller is coupled to the charge pump and is configured to duty cycle the charge pump based on a comparison of a signal of a gate of the power transistor to a reference signal.