Duty Cycle Detection Circuit With Comparator Offset Compensation
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Solution Overview
Problem
Existing duty cycle detection circuits in semiconductor circuits face accuracy issues due to process variations, leading to offsets that affect the accuracy of duty cycle correction, particularly in semiconductor memories where data input/output timing relies on precise clock signal duty control.
Innovation Solution
A duty cycle detection circuit comprising an input switching unit and a comparator, along with offset control logic, which adjusts input terminal offsets by comparing differential input signals in different combinations and generating offset adjustment codes to stabilize the detection process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a duty cycle detection circuit is used to detect the duty of clock signals, then the duty cycle correction function is provided, but offsets due to process variation reduce the accuracy of duty cycle detection
Solution Approach 1:
The patent implements a feedback mechanism where the duty cycle detection circuit continuously monitors the clock signal duty cycle, compares it against a reference value, and adjusts the duty cycle accordingly. The offset control logic detects offsets in the differential input signals and generates correction signals to compensate for process variations, creating a closed-loop system that maintains accurate duty cycle detection despite manufacturing variations.
Solution Approach 2:
The patent changes the operating parameters of the duty cycle detection circuit by adjusting the offset of differential input terminals based on detected errors. The offset control logic dynamically modifies the threshold voltages or reference levels in the comparator circuit to compensate for process variations, allowing the circuit to adapt to different manufacturing conditions and maintain measurement precision.
2Measurement precision
If offset control logic is added to adjust input terminal offsets, then duty cycle detection accuracy is improved, but device complexity increases
Solution Approach 1:
The patent merges the offset control logic with the existing duty cycle detection circuit, integrating the offset detection and correction functions into the same hardware structure. The offset control logic shares common components such as the comparator, differential input terminals, and control signal pathways with the main detection circuit, reducing the need for separate dedicated offset correction hardware and minimizing overall circuit complexity.
Solution Approach 2:
The duty cycle detection circuit performs self-correction by using its own output signals to control the offset adjustment. The offset control logic is driven by the duty detection signals generated by the same circuit, creating a self-regulating system that automatically compensates for its own offsets without requiring external intervention or additional complex control mechanisms.
Data Source
AI summary
Devices and methods for detecting and correcting duty cycles are described. An input switching unit is configured to perform at least one of an operation of outputting differential input signals as a first combination of first and second output signals and an operation of outputting the differential input signals as a second combination of the first and second output signals, according to one of a plurality of control signals. A comparator is configured to receive the first output signal through a first input terminal thereof, to receive the second output signal through a second input terminal thereof, to generate duty detection signals by comparing the signal of the first input terminal and the signal of the second input terminal according to at least another one of the plurality of control signals, and to adjust an offset of at least one of the first input terminal and the second input terminal.