Duty Cycle Calibration Circuit for Single-Ended Clock Signals
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Solution Overview
Problem
Current duty cycle calibration methods are challenging to apply to signals without complementary signals, such as single-ended I/O signals in DDR, as they rely on complementary signals to generate a duty cycle error signal.
Innovation Solution
A duty cycle calibration circuit and method that includes a driving circuit, a voltage dividing unit, a low-pass filter, a voltage controlled oscillator, a digital processing unit, and a duty cycle adjustment unit, which generates a reference voltage based on a target duty cycle and compares it with the clock signal frequency to adjust the duty cycle.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If traditional duty cycle calibration methods using complementary signals are applied, then duty cycle calibration can be achieved for differential signals, but the method cannot be applied to single-ended I/O signals without complementary signals
Solution Approach 1:
The patent introduces an intermediary signal processing path that converts the single-ended clock signal into a form suitable for duty cycle measurement. Instead of directly comparing complementary signals, the invention uses an intermediary conversion process that allows duty cycle calibration without requiring complementary signal pairs, thereby extending applicability to single-ended I/O signals
Solution Approach 2:
The patent changes the measurement parameter from direct signal comparison to frequency domain analysis. By converting the duty cycle measurement problem into a frequency comparison problem through spectral analysis, the method enables calibration of single-ended signals that cannot be calibrated using traditional complementary signal comparison techniques
2Measurement precision
If complementary signals are used for duty cycle calibration, then accurate error signal generation is possible, but the solution becomes inapplicable to single-ended I/O signals
Solution Approach 1:
The patent segments the duty cycle measurement process into independent frequency analysis components. Instead of requiring a complete complementary signal pair for measurement, the invention divides the measurement into separable frequency domain operations that can be performed on single-ended signals independently, maintaining measurement precision while improving signal type compatibility
3Adaptability or versatility
If voltage dividing and frequency comparison methods are used, then duty cycle can be calibrated for single-ended signals, but the circuit complexity increases
Solution Approach 1:
The patent replaces traditional analog duty cycle measurement mechanisms with frequency domain processing. Instead of using complex analog circuitry to directly measure duty cycle of single-ended signals, the invention substitutes mechanical/analog comparison methods with frequency analysis and digital processing, achieving single-ended signal support while managing circuit complexity through methodological substitution
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively calibrates the duty cycle of clock signals without complementary signals, addressing the limitations of existing methods and ensuring accurate duty cycle adjustment for single-ended I/O signals.
Implementation Method 1
a voltage dividing unit connected to the driving circuit unit for voltage dividing based on a target duty cycle to obtain a reference voltage
Implementation Method 2
a low-pass filter connected to the driving circuit unit for receiving the clock signal and performing low-pass filtering on the clock signal
Implementation Method 3
a voltage controlled oscillator connected to the voltage dividing unit and the low-pass filter for generating a reference frequency corresponding to the reference voltage and a clock signal frequency corresponding to the clock signal based on the reference voltage and the filtered clock signal
Data Source
AI summary
A duty cycle calibration circuit and method solves duty cycle calibration without single ended I/O signals. The calibration circuit includes driving circuit and voltage divider units, a low-pass filter, voltage controlled oscillator, digital processing unit, and duty cycle adjustment unit. The driving circuit unit outputs a clock signal for calibration; the voltage dividing unit divides voltage based on target duty cycle obtaining reference voltage; the low-pass filter performs low-pass filtering on the clock signal; the voltage controlled oscillator generates reference frequency corresponding to reference voltage and clock signal frequency corresponding to the clock signal based on reference voltage and filtered clock signal; the digital processing unit compares clock signal frequency with reference voltage frequency and generates a duty cycle adjustment control signal based on comparison result; and the duty cycle adjustment unit calibrates clock signal duty cycle based on the duty cycle adjustment control signal obtaining the target duty cycle.