Duty Cycle Adjustment Circuit with Independent Range and Step Control

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

High-speed input/output devices face challenges in maintaining acceptable timing margins due to process, voltage, and temperature variations, especially when operating at higher frequencies, as traditional duty cycle adjustment methods that use both rising and falling edges of the clock signal result in reduced timing margins and increased power consumption.

Innovation Solution

The implementation of a duty cycle adjustment circuitry with independent range and step size control, comprising strength tuning and fine tuning circuits, allows for decoupling of tuning range from resolution, enabling precise adjustment of the duty cycle without affecting the resolution, thus maintaining optimal timing margins while reducing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If traditional duty cycle adjustment methods using both rising and falling edges are employed to operate at higher frequencies, then data transfer speed is improved, but timing margins are reduced and power consumption increases

Engineering Contradiction:
Improvedata transfer speedVSAvoidtiming margins
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The duty cycle adjustment circuit is divided into multiple independent stages (first stage, second stage, etc.), each with its own strength tuning and fine tuning circuits. This segmentation allows independent control of different duty cycle parameters, enabling precise adjustment of timing margins without affecting overall data transfer speed.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The circuit employs dynamically adjustable strength tuning circuits and fine tuning circuits that can adaptively modify duty cycle parameters based on operating conditions. This dynamic adjustment capability allows the system to maintain optimal timing margins across varying frequencies and process conditions.

Inventive Principle:
Principle #15Dynamics

2Productivity

If traditional duty cycle adjustment methods are used, then both rising and falling edges can be utilized for sampling, but power consumption increases

Engineering Contradiction:
Improvesampling efficiencyVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The fine tuning circuits provide partial adjustment capability that supplements the strength tuning circuits. This partial action approach allows the system to achieve precise duty cycle control with minimal power consumption by only activating fine tuning when necessary for precise adjustment.

Inventive Principle:
Principle #16Partial or excessive action

3Device complexity

If duty cycle adjustment is performed with coupled range and resolution control, then circuit complexity is reduced, but manufacturing precision of duty cycle is compromised

Engineering Contradiction:
Improvecircuit structureVSAvoidduty cycle precision
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The control mechanism is segmented into independent strength tuning control and fine tuning control pathways. This segmentation enables precise manufacturing of duty cycle parameters without increasing overall circuit complexity, as each segment can be independently optimized and controlled.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11569806B2Duty cycle adjustment circuit with independent range and step size control
Publication Date: 2023.01.31 SYNOPSYS INC
  • US11569806B2 patent drawing
  • US11569806B2 patent drawing
  • US11569806B2 patent drawing

AI summary

Duty cycle adjustment circuitry includes a first stage, a second stage, and decoder circuitry. The first stage includes a first strength tuning circuit having first inverter branches, and a first fine tuning circuit having second inverter branches. The first strength tuning circuit and the first fine tuning circuit are coupled in parallel. The second stage includes a second strength tuning circuit having third inverter branches, and a second fine tuning circuit having fourth inverter branches. The second strength tuning circuit and the second fine tuning circuit are coupled in parallel. Further, the second stage is electrically coupled to the first stage. The decoder circuitry is electrically coupled to the first stage and the second stage. The decoder circuitry controls the first strength tuning circuit independently from the first fine tuning circuit to adjust the duty cycle of an input signal received by the duty cycle adjustment circuitry.