Duty-Cycled Resistor Resetting for Low-Noise Capacitive Feedback Circuits
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Solution Overview
Problem
Duty-cycled resistors with parasitic capacitors face performance degradation due to stored parasitic voltages, leading to noise and decreased signal-to-noise ratio in amplification and integration circuits, particularly in low-frequency applications with capacitive feedback.
Innovation Solution
A duty-cycled resistor design that includes switches to connect and disconnect resistors and reset voltage nodes during specific time intervals, effectively resetting parasitic capacitors and mitigating memory effects by ensuring they are always at the same voltage as the reset node, thereby removing stored charges and reducing noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a duty-cycled resistor with parasitic capacitor is used in amplification and integration circuits, then the resistor provides frequency-dependent impedance characteristics useful for signal processing, but the parasitic capacitor stores voltages that cause noise and degrade signal-to-noise ratio
Solution Approach 1:
The patent converts the harmful parasitic capacitor into a beneficial element by deliberately adding it in parallel with the duty-cycled resistor. This parasitic capacitor, when properly sized, filters high-frequency noise and stabilizes the voltage at the inverting terminal, transforming the previously harmful stored charges into a useful filtering effect that improves overall circuit performance
Solution Approach 2:
The patent changes the electrical parameters of the circuit by adding a specifically sized parasitic capacitor (Cp) in parallel with the duty-cycled resistor. This parameter modification alters the impedance characteristics and voltage distribution in the feedback path, enabling the circuit to maintain virtual ground conditions while reducing noise from stored parasitic voltages
2Productivity
If a duty-cycled resistor is used to achieve low-frequency amplification with capacitive feedback, then the circuit achieves the desired frequency response, but performance degradation occurs due to stored charges in parasitic capacitors
Solution Approach 1:
The patent converts the harmful effect of parasitic capacitance into a beneficial filtering mechanism. By adding a deliberately sized parasitic capacitor in parallel with the duty-cycled resistor, the circuit uses this capacitance to filter high-frequency components and stabilize the feedback path, thereby improving output signal accuracy while maintaining low-frequency amplification performance
3Reliability
If switches are added to create a duty-cycled resistor configuration with reset nodes, then parasitic capacitors can be reset to remove stored charges, but the device complexity increases
Solution Approach 1:
The patent merges the reset function with the existing duty-cycled resistor structure by adding a single parasitic capacitor in parallel. This configuration allows the reset switches to simultaneously discharge the parasitic capacitor and reset the duty-cycled resistor, combining multiple reset functions into a unified structure that reduces overall device complexity
Solution Approach 2:
The parasitic capacitor serves multiple functions: it filters high-frequency noise, stabilizes the voltage at the inverting terminal, and works with the reset switches to discharge stored charges. This multi-functionality reduces the need for additional separate components, thereby managing device complexity while achieving noise reduction
Data Source
AI summary
An amplification apparatus includes an amplifier having an inverting terminal, and a non-inverting terminal connected to a reset voltage node, a first capacitor connected to the inverting terminal, an input voltage being applied to the first capacitor, a second capacitor connected to the inverting terminal and an output terminal of the amplifier, and a duty-cycled resistor, connected in parallel to the second capacitor, including a first resistor. The duty-cycled resistor is configured to connect the first resistor and the inverting terminal and to disconnect the first resistor and the reset voltage node during a first time interval included in a period to complete an on-and-off cycle of the duty-cycled resistor, and disconnect the first resistor and the inverting terminal and to connect the first resistor and the reset voltage node during a second time interval included in the period.