Duty Locked Loop Circuit for Accurate Low-Power Duty Cycle Control
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Solution Overview
Problem
Existing duty locked loop circuits in switched mode power supply systems face accuracy issues due to current mismatch, particularly in low power designs, leading to degradation of DC operating point accuracy and increased output offset.
Innovation Solution
A duty locked loop circuit is implemented with an integrator circuit and switch network that generates an output voltage proportional to the integral of the difference between two input signals' duty cycles, using a scaled voltage level for high accuracy, and an output circuit that synchronizes the output signal with a clock signal to adjust the duty cycle, ensuring high accuracy and low complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If existing duty locked loop circuits are used in low power designs, then power consumption is reduced, but current mismatch occurs leading to degradation of DC operating point accuracy
Solution Approach 1:
The patent introduces a duty locked loop circuit as an intermediary component between the PWM controller and the power switch. This mediator circuit generates a corrected duty cycle signal that compensates for current mismatch effects, thereby maintaining DC operating point accuracy without increasing overall power consumption. The duty locked loop acts as a buffer that processes the control signal and outputs a corrected version to drive the power stage.
2Measurement precision
If duty locked loop circuit is added to improve DC operating point accuracy, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The patent merges the duty locked loop functionality with the existing PWM control circuitry by integrating the duty cycle correction mechanism into the feedback loop. The integrator circuit combines the error signal from the voltage regulator with the duty cycle information, merging multiple functions (error amplification, duty cycle generation, and correction) into a unified circuit structure. This reduces overall system complexity compared to adding a completely separate duty locked loop module.
Solution Approach 2:
The duty locked loop circuit performs multiple functions simultaneously: it generates the duty cycle signal for the power switch, corrects for current mismatch effects, and maintains DC operating point accuracy. The integrator circuit serves both as an error amplifier and a duty cycle generator. This multi-functionality reduces the need for separate dedicated circuits for each function, thereby limiting the increase in device complexity.
3Stability of the object's composition
If feedback loop is used to regulate voltage, then output voltage stability is improved, but response time to transient conditions increases
Solution Approach 1:
The duty locked loop circuit performs preliminary action by pre-correcting the duty cycle signal before it reaches the power switch. The integrator circuit anticipates the need for duty cycle adjustment by continuously integrating the error signal, so when a transient load change occurs, the corrected duty cycle is already prepared and can be applied immediately. This preliminary correction reduces the effective response time while maintaining the stabilizing feedback mechanism.
Solution Approach 2:
The patent implements a feedback mechanism where the output voltage is continuously monitored and compared with the reference voltage, and the resulting error signal is fed back to the integrator circuit. This feedback loop dynamically adjusts the duty cycle in real-time to compensate for transient load changes. The feedback ensures voltage stability while the integrator's continuous adjustment capability enables faster response to transient conditions compared to simple proportional control.
Data Source
AI summary
The present disclosure provides a duty locked loop circuit that includes a switch network including a first electronic switch device controlled by a first control signal that is based on a first input signal and a second electronic switch device controlled by a second control signal that is based on a second input signal. The duty locked loop circuit includes an integrator circuit electrically connected to the switch network. The integrator circuit is configured to generate an output voltage proportional to an integral of a difference between a first duty cycle of the first input signal and a second duty cycle of the second input signal. The duty locked loop circuit includes an output circuit configured to generate an output signal having an output duty cycle that is based on the output voltage.