Duty Ratio Correction Circuit Without Low-Pass Filter Delay

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Solution Overview

Problem

Existing duty ratio correction circuits face a tradeoff between high-precision correction and high-speed stabilization due to the difficulty in balancing the parameters of low-pass filters and integral capacitors, leading to increased jitter and ripple in control voltages.

Innovation Solution

A duty ratio correction circuit that utilizes a delay circuit to align the phases of clock and inverted clock signals, combined with a differential amplifier to suppress high-frequency components, thereby omitting the need for low-pass filters and large integral capacitors, enabling high-precision and high-speed stabilization of duty ratios.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If low-pass filters and large integral capacitors are used in traditional duty ratio correction circuits, then high-precision correction is achieved, but stabilization speed decreases and jitter increases

Engineering Contradiction:
Improveduty ratio correction precisionVSAvoidstabilization speed
Core Design Contradiction:
Measurement precisionVSSpeed

Solution Approach 1:

The patent extracts and removes the low-pass filter component from the traditional duty ratio correction circuit. By eliminating this component, the circuit achieves rapid stabilization without the time delays and jitter that filters introduce, while still maintaining high-precision correction through the differential amplifier architecture

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent replaces the mechanical filtering approach (low-pass filters and large capacitors) with an electrical differential amplification approach. The differential amplifier directly processes the clock signals to generate the control voltage, substituting the need for physical filtering and energy storage components

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Stability of the object's composition

If low-pass filters are used to suppress high-frequency components, then ripple in control voltages is reduced, but circuit complexity and time delay increase

Engineering Contradiction:
Improvecontrol voltage stabilityVSAvoidcircuit complexity
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The patent extracts and removes the low-pass filter from the circuit, achieving control voltage stability through the differential amplifier's inherent ability to process differential signals and reject common-mode noise, thereby simplifying the circuit architecture

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The differential amplifier performs multiple functions simultaneously: it amplifies the duty ratio difference signal, suppresses high-frequency components through its bandwidth characteristics, and generates the control voltage, replacing what traditionally required separate filter and amplifier stages

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed circuit achieves precise and rapid stabilization of duty ratios by suppressing high-frequency components and reducing ripple in control voltages, allowing for efficient duty ratio correction without the time delays associated with traditional methods.

Implementation Method 1

a delay circuit to align the phases of clock and inverted clock signals

Methodology Applied
Scientific EffectPhase alignment through delay:

Implementation Method 2

a differential amplifier to suppress high-frequency components

Methodology Applied
Scientific EffectDifferential amplification:

Data Source

PatentUS12556166B2Duty ratio correction circuit, clock distribution system, and duty ratio correction method
Publication Date: 2026.02.17 NEC CORP
  • US12556166B2 patent drawing
  • US12556166B2 patent drawing
  • US12556166B2 patent drawing

AI summary

A duty ratio correction circuit includes: a duty ratio adjustment circuit that adjusts a duty ratio of an input first clock, based on a control signal, and outputs a second clock being the first clock in which the duty ratio is adjusted; an inverted signal generation circuit that receives the second clock, and outputs an output clock having a phase of the second clock, and an inverted clock being a signal in which a phase of the output clock is inverted; a delay circuit that causes a delay of a delay amount associated to a half cycle of the output clock between the output clock and the inverted clock; and a differential amplifier that outputs, to the duty ratio adjustment circuit, as the control signal, a signal in which a difference in amplitude between the output clock and the inverted clock that are output from the delay circuit is amplified.