DVFS Delay Detection Circuit for Adaptive Supply Voltage Control

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Solution Overview

Problem

Existing dynamic voltage and frequency scaling (DVFS) approaches in integrated circuits require large safety margins due to worst-case process and temperature considerations, leading to suboptimal power consumption and inefficient resource allocation.

Innovation Solution

An integrated circuit with a detection circuit that monitors signal propagation delays relative to configurable supply voltage, using a replica delay path to adjust supply voltage dynamically, ensuring safe operation while minimizing power consumption by optimizing voltage levels based on actual propagation delays.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If worst-case process and temperature corners are used for DVFS control, then reliability is improved, but power consumption increases due to large safety margins

Engineering Contradiction:
Improvesafe operation guaranteeVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent creates a replica logic circuit that copies the critical path of the actual logic circuit. This replica circuit experiences the same process and temperature variations but operates in isolation, allowing safe measurement of propagation delays without affecting the main circuit's reliability. The replica acts as a test subject that absorbs the worst-case variations.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent implements a feedback mechanism where the measured propagation delay from the replica circuit is continuously monitored and used to dynamically adjust the supply voltage. The control circuit receives the measured delay, compares it against the clock period, and adjusts voltage accordingly, creating a closed-loop system that adapts to actual operating conditions rather than relying on static worst-case margins.

Inventive Principle:
Principle #23Feedback

2Reliability

If large safety margins are applied to supply voltage and clock frequency, then reliability is improved, but device efficiency deteriorates

Engineering Contradiction:
Improvesignal propagation guaranteeVSAvoidresource allocation efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent transitions from static DVFS control based on fixed worst-case parameters to dynamic control that continuously adapts to actual operating conditions. The supply voltage and clock frequency are adjusted in real-time based on measured propagation delays, allowing the system to operate at optimal points rather than conservative fixed points, thereby improving resource allocation efficiency.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the operating parameters (supply voltage and clock frequency) based on actual measured propagation delays rather than fixed worst-case values. By continuously monitoring and adjusting these parameters according to real-time conditions, the system eliminates the need for large safety margins while maintaining reliable operation.

Inventive Principle:
Principle #35Parameter changes

3Ease of operation

If prior DVFS approaches use fixed safety margins, then ease of operation is improved, but measurement precision deteriorates

Engineering Contradiction:
ImproveDVFS implementation simplicityVSAvoidpropagation delay measurement
Core Design Contradiction:
Ease of operationVSMeasurement precision

Solution Approach 1:

The patent implements a self-measuring system where the replica logic circuit automatically measures its own propagation delay under actual operating conditions. The circuit self-adjusts and self-optimizes without requiring external characterization or complex measurement equipment, making the system easy to operate while achieving high measurement precision.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS12567857B2Dynamic voltage and frequency scaling
Publication Date: 2026.03.03 NORDIC SEMICONDUCTOR
  • US12567857B2 patent drawing
  • US12567857B2 patent drawing
  • US12567857B2 patent drawing

AI summary

An integrated circuit comprises an oscillator which outputs a clock signal, a logic circuit portion, a detection circuit portion for detecting signal propagation delay relative to clock frequency, and a power supply which provides a configurable supply voltage. The detection circuit comprises a latch circuit portion, a delay circuit portion and a comparison circuit portion. The latch circuit portion outputs an alternating signal which changes state in dependence on the clock signal. This is received by the delay circuit portion which outputs first and second delayed signals respectively subject to first and second propagation delays each dependent on the supply voltage. The comparison circuit portion compares the alternating signal with the delayed signals, and outputs respective comparison signals if said signals indicate that the respective propagation delay is smaller than the clock signal period. A control circuit portion controls the supply voltage in dependence on the comparison signals.