Dynamic Adaptive Last-Level Cache for Multi-Core Processors
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Solution Overview
Problem
In multi-core processors, cache access times are affected by propagation delays and distance, leading to inefficiencies in shared and private cache designs, particularly in applications where data sharing patterns vary, such as in recognition, data mining, and synthesis tasks.
Innovation Solution
A dynamic adaptive last-level cache architecture that classifies and re-classifies data as private or shared based on usage patterns, moving data closer to the core accessing it to reduce travel distance and energy consumption, utilizing a hybrid cache that automatically adjusts its configuration during program execution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of stationary object
If a large cache is organized into a single shared cache, then cache capacity is extended, but cache access time increases due to propagation delays and distance
Solution Approach 1:
The shared cache is segmented into multiple banks, each physically located near a specific core. This segmentation allows the cache to be divided into closer, smaller units that reduce propagation delays while maintaining overall large capacity. The patent implements this by creating cache banks that are geographically distributed across the processor chip, with each bank serving as a local storage unit for nearby cores.
Solution Approach 2:
Different portions of the cache have different location properties - some data is stored in cache banks closer to specific cores while other data remains in more centralized locations. This local quality approach optimizes access time for frequently accessed data by placing it in nearby cache banks, while less frequently accessed data can remain in centralized storage. The patent uses data classification to determine which data should be placed in which cache bank based on access patterns.
2Volume of stationary object
If data is stored in a shared cache bank far from the accessing core, then cache capacity is maximized, but energy consumption increases due to longer interconnect traffic
Solution Approach 1:
The cache is segmented into multiple physically distributed banks, reducing the average distance data must travel across the interconnect. This segmentation decreases energy consumption by minimizing the length of data paths while preserving total cache capacity through the distributed architecture.
Solution Approach 2:
Data is strategically placed in cache banks based on its access patterns and the location of accessing cores. Frequently accessed data is placed in nearby cache banks to minimize interconnect traffic and energy consumption, while maintaining overall cache capacity through efficient spatial distribution.
3Loss of time
If a private cache is used for each core, then cache access time is reduced, but cache capacity is limited for each core
Solution Approach 1:
The patent merges the benefits of private and shared caches by creating a hybrid architecture where each core has preferential access to nearby cache banks (private cache benefit) while all cores can access the entire distributed cache system (shared cache benefit). This combination provides both fast local access and large total capacity.
Solution Approach 2:
The distributed cache banks serve multiple functions - they act as private caches for nearby cores when data is locally stored, and as shared cache when data is accessed from remote banks. This multi-functionality allows the same cache infrastructure to provide both private and shared access patterns depending on data placement and access needs.
4Loss of time
If data is moved closer to accessing cores, then cache access time is reduced, but cache configuration complexity increases
Solution Approach 1:
The cache configuration is made dynamic through data classification and reclassification mechanisms. Data can be moved between different cache banks based on changing access patterns, allowing the system to adapt to different workload requirements. This dynamic reconfiguration optimizes access time without requiring static complex hardware routing.
Solution Approach 2:
The system uses feedback from data access patterns to dynamically classify and relocate data within the cache hierarchy. By monitoring which data is frequently accessed by which cores, the system automatically adjusts data placement to optimize access times, reducing the need for complex pre-configured routing logic.
Data Source
AI summary
In one embodiment, the present invention includes a method for determining if a state of data is indicative of a first class of data, re-classifying the data from a second class to the first class based on the determination, and moving the data to a first portion of a shared cache associated with a first requester unit based on the re-classification. Other embodiments are described and claimed.


