Dynamic Address Allocation for Multi-Master I2C Bus Systems

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Solution Overview

Problem

Existing bus systems require manual interaction for connecting new devices, and new devices cannot always be connected during the operation of a main device without causing address conflicts or requiring user intervention.

Innovation Solution

An automatic addressing bus system with multi-master capable bus controllers allows end devices to initiate address allocation procedures independently, enabling dynamic and automatic address allocation on bus systems like I2C, allowing new devices to connect during operation without user interaction and avoiding address conflicts.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If manual address allocation is used in existing bus systems, then address conflicts can be avoided, but user interaction is required and connection time increases

Engineering Contradiction:

Improveaddress conflict avoidanceVSAvoiduser interaction requirement

Core Design Contradiction:

ReliabilityVSEase of operation

Solution Approach 1:

The end device autonomously initiates and executes the address allocation procedure by detecting the main device's address and automatically initiating communication to request address assignment, eliminating the need for user intervention while maintaining reliable address conflict avoidance through systematic address assignment by the main device

Inventive Principle:

Principle #25Self-service

2Adaptability or versatility

If devices are connected during operation in existing bus systems, then system adaptability improves, but address conflicts may occur

Engineering Contradiction:

Improvedevice connection during operationVSAvoidaddress conflict risk

Core Design Contradiction:

Adaptability or versatilityVSReliability

Solution Approach 1:

The end device performs preliminary actions by detecting the main device's address and initiating the address allocation procedure before fully integrating into the bus system, ensuring that a unique address is assigned before the device begins communicating with other end devices, thus preventing address conflicts during operation

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The system employs feedback mechanisms where the end device requests address assignment from the main device, and the main device responds with a assigned address, creating a controlled feedback loop that ensures unique address allocation even when multiple end devices connect during operation

Inventive Principle:

Principle #23Feedback

3Device complexity

If static address allocation is used, then address assignment is simple, but connection time and setup effort increase

Engineering Contradiction:

Improveaddress assignment simplicityVSAvoidconnection setup time

Core Design Contradiction:

Device complexityVSLoss of time

Solution Approach 1:

The system transitions from static address allocation to dynamic address allocation where the end device can initiate the address assignment process at any time during operation, making the address allocation flexible and adaptive rather than fixed, thereby reducing connection setup time while maintaining simplicity through automated procedures

Inventive Principle:

Principle #15Dynamics

Data Source

PatentUS8566490B2Method and system for address allocation for a plurality of devices connected to a multi-master bus

Publication Date: 2013.10.22 FLUKE CORP

AI summary

An automatic addressing bus system and method of communication comprising a main and an end device, wherein the respective bus controllers used in the main and end devices comprise multi-master capability. The main controlling device has an address known to the end device to be connected, the end device is able to actively initiate the address allocation procedure, without the need for user interaction. The method and system of the present system may be implemented using such known bus systems such as 2-wire serial buses, in particular I2C, and enables both automatic and dynamic address allocation.