Dynamic Address Mapping for Nonvolatile Memory Interleaving
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Solution Overview
Problem
Existing data storage devices with multiple memory devices face challenges in efficiently managing and optimizing data processing due to fixed address mapping methods, which fail to adapt to changing environmental factors such as host device requests and memory device states, leading to suboptimal performance and idle times.
Innovation Solution
A dynamic interleaving method that remaps physical addresses into logical addresses based on environmental factors, including the states of channels and flash memory devices, to optimize data processing by dynamically adjusting address mapping and interleaving operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a general interleaving method with fixed address mapping is used, then the data storage device can process data at high rates, but it cannot reflect environmental factors such as host device request states and memory device states
Solution Approach 1:
The patent implements dynamic address mapping by changing the fixed interleaving pattern based on real-time environmental factors. The controller adjusts the mapping between logical addresses and physical addresses according to host device request states and memory device states, enabling the system to adapt dynamically to varying conditions while maintaining high data processing speed.
Solution Approach 2:
The patent changes the address mapping parameters dynamically. Instead of using a fixed interleaving pattern, the system modifies mapping parameters based on environmental factors such as which memory devices are in idle state and which are busy. This allows optimization of data processing speed according to current system conditions.
2Quantity of substance
If multiple memory devices are used to increase storage capacity, then the storage capacity increases, but the complexity of controlling the memory devices increases
Solution Approach 1:
The patent segments the control of multiple memory devices by introducing channel-level management. Each channel is independently controlled with its own interleaving pattern, allowing the controller to manage multiple memory devices through organized segmentation rather than monolithic control, thereby reducing overall control complexity.
Solution Approach 2:
The patent implements feedback mechanisms where the controller monitors the states of memory devices and adjusts address mapping accordingly. This feedback loop enables automatic optimization of data processing based on real-time conditions, simplifying control by allowing the system to self-adjust rather than requiring complex manual control logic.
3Productivity
If fixed address mapping is used in general interleaving method, then the implementation is simple, but idle times of memory devices cannot be minimized
Solution Approach 1:
The patent dynamically adjusts address mapping to minimize idle times. By monitoring which memory devices are idle and which are busy, the system changes the interleaving pattern in real-time to ensure data is routed to available devices, thereby minimizing idle time and maximizing data processing speed.
Data Source
AI summary
An operating method of a data storage device including a plurality of nonvolatile memory devices includes the steps of: mapping physical addresses of the nonvolatile memory devices into logical addresses; reflecting environmental factors to remap a physical address into a logical address requested to be accessed; and performing an interleaving operation for the nonvolatile memory devices using the remapped physical address.