Dynamic Addressing in Master-Slave Bus Systems

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing master-slave bus systems require manual and error-prone methods for addressing slave units, are costly, and need additional components for automated addressing, which is not fully automatic after system start-up.

Innovation Solution

A dynamically addressable master-slave system where a master unit initiates addressing by broadcasting a start value to all slaves, using a separate addressing line for serial communication, allowing each slave to increment its address automatically, eliminating the need for a bus architecture and manual intervention.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If manual addressing methods are used to assign unique addresses to slave units, then each slave can be individually addressed, but the process is time-consuming and error-prone

Engineering Contradiction:
Improveaddressing accuracyVSAvoidaddressing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

Slave units automatically determine their own addresses by detecting signals from neighboring slaves and incrementing accordingly, eliminating the need for manual address assignment by operators

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The system performs address allocation automatically during system initialization or startup, so that addressing is completed before normal operation begins, making the process invisible to users

Inventive Principle:
Principle #10Preliminary action

2Extent of automation

If automated addressing systems are implemented using existing bus architectures, then addressing can be performed automatically, but additional system components are required which increase costs and installation space

Engineering Contradiction:
Improveaddressing automationVSAvoidsystem components
Core Design Contradiction:
Extent of automationVSDevice complexity

Solution Approach 1:

The addressing function is integrated into the existing slave units themselves, which already have the capability to detect signals and communicate on the bus, eliminating the need for separate addressing hardware

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The addressing functionality is extracted from complex external systems and embedded directly into the simple slave units, reducing overall system complexity while maintaining automation

Inventive Principle:
Principle #2Taking out (Extraction)

3Extent of automation

If shift register addressing is used to dynamically assign addresses to slaves, then automated addressing is achieved, but a clock signal from the master is required and addressing does not run quasi-automatically after system start

Engineering Contradiction:
Improveaddressing automationVSAvoidsystem operation
Core Design Contradiction:
Extent of automationVSEase of operation

Solution Approach 1:

The addressing system dynamically adapts to the actual configuration of slave units on the bus by having each slave detect signals from its neighbors and automatically determine its position, rather than using a fixed sequential assignment requiring clock synchronization

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10089273B2Dynamic addressing
Publication Date: 2018.10.02 EBM PAPST MULFINGEN GMBH & CO KG
  • US10089273B2 patent drawing
  • US10089273B2 patent drawing
  • US10089273B2 patent drawing

AI summary

This invention relates to a dynamically addressable master-slave system and a method for dynamic addressing of slave units, wherein a master unit and a plurality of slave units are provided and the slave units are connected to the master unit via a bus system and can receive at least one broadcast command from the master unit via the bus line of the bus system, wherein the master-slave system is configured such that the master unit can send respective broadcast commands to the slave units, on the one hand, for activation, and on the other hand, for performing the dynamic addressing process of slave addresses, and wherein the slave units each comprise an address input and an address output and are serially connected via an address line that is separate from the bus line.