Dynamic Amplifier Topology for Low Common-Mode, High Linearity
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Solution Overview
Problem
Existing high-speed signal amplifiers face challenges with high input common-mode voltage and poor linearity, particularly in high-speed analog-to-digital converters, complicating the design of sampling and holding circuits.
Innovation Solution
A high-linearity dynamic amplifier design incorporating a first and second differential branch of MOS transistors, connected in series between a high-level and ground-level terminal, with specific terminal connections to reduce input common-mode voltage and enhance linearity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If traditional dynamic amplifier based on open-loop mode with phase inverter structure is used, then amplification speed is high and noise is low, but input common-mode voltage is high (half of power voltage)
Solution Approach 1:
The patent inverts the traditional phase inverter structure by using a differential pair configuration where the input common-mode voltage is no longer constrained to be half of the power voltage. The differential branch structure allows the amplifier to operate with lower input common-mode voltage while maintaining high amplification speed through the open-loop differential amplification mechanism.
2Ease of operation
If source-followed circuit structure is used to reduce input common-mode voltage, then sampling clock design is simplified, but signal amplification function is lost
Solution Approach 1:
The patent merges the advantages of source-followed circuit (low input common-mode voltage) with differential amplification structure (signal amplification capability). The differential branch configuration allows the circuit to simultaneously achieve low input common-mode voltage operation and maintain strong signal amplification function, eliminating the need for bootstrap or AC coupling in sampling clock design.
3Device complexity
If traditional open-loop operational amplifier is used, then structure is simple and amplification speed is high, but linearity is medium
Solution Approach 1:
The patent segments the amplifier into multiple differential branches, each contributing to the overall amplification while maintaining linearity. The differential pair structure in each branch provides balanced signal paths that cancel out even-order harmonics, improving linearity without significantly increasing circuit complexity. The segmented differential structure allows for better control of signal paths and reduced distortion.
Data Source
AI summary
A high-linearity dynamic amplifier includes a first differential branch and a second differential branch. The first differential branch includes a first MOS transistor and a second MOS transistor which are connected between a high-level terminal and a ground-level terminal in series. A connection point of the first MOS transistor and the second MOS transistor is a second output terminal. The second differential branch includes a third MOS transistor and a fourth MOS transistor which are connected between the high-level terminal and the ground-level terminal in series. A connection point of the third MOS transistor and the fourth MOS transistor is a first output terminal. A grid terminal of the second MOS transistor is connected to a drain terminal of the fourth MOS transistor. A grid terminal of the fourth MOS transistor is connected to a drain terminal of the second MOS transistor.