Dynamic ANR Filter Topology for Low-Power Broadband Noise Cancellation
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Solution Overview
Problem
Existing personal active noise reduction (ANR) devices face issues with high power consumption, limited frequency ranges for noise cancellation, and the introduction of unwanted noise, which affect their effectiveness and user experience.
Innovation Solution
A dynamically configurable ANR circuit that incorporates feedback-based and feedforward-based noise reduction methods, along with passive noise reduction, using a combination of digital and analog signal processing topologies and filter configurations to optimize noise cancellation while minimizing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If active noise reduction is implemented across all audible frequencies, then noise cancellation effectiveness is improved, but power consumption increases
Solution Approach 1:
The patent implements dynamic frequency-dependent activation of ANR processing stages. The system selectively enables or disables specific digital signal processing operations based on the detected frequency content of ambient noise, allowing full ANR effectiveness only when and where needed, thereby reducing overall power consumption while maintaining noise cancellation performance.
Solution Approach 2:
The system changes processing parameters (such as filter coefficients, sampling rates, and processing gain) based on the characteristics of the input noise signal. By adapting these parameters to match the actual noise profile, the system achieves effective noise cancellation with minimized computational load and power consumption.
2Reliability
If multiple digital signal processing stages are used to broaden frequency range, then noise reduction efficacy is improved, but device complexity increases
Solution Approach 1:
The patent divides the noise reduction process into multiple frequency-specific processing stages, each handling a particular frequency band. This segmentation allows the system to apply appropriate processing complexity only to the bands that require it, broadening the effective frequency range while managing overall system complexity through modular design.
Solution Approach 2:
The system employs a multi-functional signal processing architecture where a single processing pipeline can handle multiple frequency ranges and noise types by dynamically configuring its operation. This universal approach allows the same hardware to perform simple or complex processing depending on the input signal characteristics, reducing the need for separate dedicated circuits for each frequency band.
3Reliability
If higher processing power is applied to cancel low frequency sounds, then noise reduction effectiveness is improved, but more unwanted noise is generated
Solution Approach 1:
The patent applies different processing qualities and intensities to different frequency regions. For low frequency sounds, the system uses carefully controlled processing with specific filter designs that minimize distortion and unwanted artifacts, while applying more aggressive processing to higher frequencies where it is less audible. This local differentiation maintains effectiveness while reducing unwanted noise generation.
Data Source
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AI summary
Apparatus comprising an ANR circuit comprising: a ADC; a DAC; a processing device; and a storage in which is stored a sequence of instructions causing the processing device to: incorporate a plurality of digital filters of a quantity specified by a first set of ANR settings into a filter block located along a pathway extending from the ADC to the DAC through which digital data associated with providing ANR flows within the ANR circuit; select a type of digital filter specified by a first set S1 of ANR settings for each digital filter; adopt a filter block topology specified by S1 within the filter block by configuring interconnections among each of the digital filters; configure each of the digital filters with filter coefficients specified by S1; set a data transfer rate at which digital data flows through one of the digital filters as specified by S1; cause the ADC, the filter block and the DAC to be operated to provide ANR using reference sounds represented by an analog signal received by ANR circuit through the ADC to derive anti-noise sounds represented by an analog signal output by the ANR circuit through the DAC; change an ANR setting specified by S1 to one specified by a second set of ANR settings in synchronization with a transfer of digital data through at least a portion of the pathway.