Dynamic Bank Address Mapping for Multi-Bank Memory
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Solution Overview
Problem
In single-instruction multiple-thread (SIMT) processing environments, bank conflicts occur when parallel threads access multi-bank memory, leading to reduced performance as accesses to addresses mapped to the same bank must be completed in separate clock cycles.
Innovation Solution
A system and method that supports dynamic bank address mapping by allowing different bank bit-widths for each memory access, enabling per-thread addresses to be dynamically mapped based on a received bank mode, thereby avoiding bank conflicts by changing the address to bank mapping each clock cycle.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a fixed bank address mapping is used for all memory accesses, then the hardware structure is simple, but bank conflicts occur when multiple threads access the same bank simultaneously
Solution Approach 1:
The patent implements dynamic bank address mapping by allowing the bank mode to change on each clock cycle. The address generation unit dynamically remaps per-thread addresses to banks based on the current bank mode, transforming the static mapping into a dynamic one that adapts to different memory access patterns and avoids bank conflicts without requiring complex hardware changes
Solution Approach 2:
The patent changes the bank mode parameter on each clock cycle to redefine how addresses map to banks. By varying the bank mode parameter dynamically, the system can reconfigure the address-to-bank mapping relationship, allowing legacy applications to run efficiently on contemporary hardware with different bank configurations without permanent hardware modifications
2Productivity
If different bank bit-widths are supported for different applications, then application performance is optimized, but the address mapping mechanism becomes more complex
Solution Approach 1:
The address generation unit is designed to handle multiple bank modes (32-bit, 64-bit, 128-bit) through a single unified mechanism. The same address generation unit dynamically adapts its behavior based on the bank mode parameter, eliminating the need for separate dedicated mapping mechanisms for different bit-widths and maintaining hardware simplicity while supporting diverse application requirements
3Adaptability or versatility
If legacy application programs are executed on contemporary processors with larger bank sizes, then backward compatibility is maintained, but performance degradation occurs due to bank conflicts
Solution Approach 1:
The system dynamically adjusts the bank mode parameter for each memory access based on the application's requirements. When executing legacy applications, the bank mode is set to match the original 32-bit bank configuration, preserving the application's optimized access patterns. For contemporary applications requiring 64-bit or 128-bit banks, the mode is updated accordingly, allowing the same hardware to adapt to different application needs without performance loss
Data Source
AI summary
One embodiment sets forth a technique for dynamically mapping addresses to banks of a multi-bank memory based on a bank mode. Application programs may be configured to perform read and write a memory accessing different numbers of bits per bank, e.g., 32-bits per bank, 64-bits per bank, or 128-bits per bank. On each clock cycle an access request may be received from one of the application programs and per processing thread addresses of the access request are dynamically mapped based on the bank mode to produce a set of bank addresses. The bank addresses are then used to access the multi-bank memory. Allowing different bank mappings enables each application program to avoid bank conflicts when the memory is accesses compared with using a single bank mapping for all accesses.