Dynamic Bias Voltage Circuit for Wide USB Pad Voltage Range
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Solution Overview
Problem
The challenge of providing a bias voltage to MOS transistors in integrated circuits (ICs) that can withstand the wide voltage variation range on USB signal pads while adhering to the maximum withstand voltage imposed by the manufacturing process is addressed.
Innovation Solution
A dynamic bias voltage circuit comprising a buffer circuit, voltage divider circuit, and voltage follower circuit, which dynamically tracks and generates a bias voltage to ensure the gate-to-drain voltage of MOS transistors does not exceed the maximum withstand voltage, using resistor networks and current mirrors to adjust current values for different operating modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a static bias voltage is set at the gate of MOS transistors, then the circuit operation is simplified, but the gate-to-drain voltage may exceed the maximum withstand voltage under wide pad voltage variations
Solution Approach 1:
The patent applies dynamics by transitioning from a static bias voltage to a dynamic bias voltage that automatically adjusts with pad voltage variations. The bias voltage circuit generates a bias voltage that dynamically tracks the pad voltage through voltage division and buffering, ensuring the gate-to-drain voltage remains within safe limits regardless of pad voltage changes.
Solution Approach 2:
The patent implements feedback by using the pad voltage itself as the input to generate the bias voltage. The voltage divider circuit divides the pad voltage to create a proportional bias voltage, and the buffer circuit ensures this bias voltage follows the pad voltage variations, creating a self-regulating system that maintains safe operating conditions.
2Reliability
If a dynamic bias voltage circuit is implemented to track pad voltage variations, then transistor reliability is improved, but the circuit complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the dynamic bias voltage generation into distinct functional modules: a voltage divider circuit that divides the pad voltage, and a buffer circuit that buffers and outputs the divided voltage. This segmentation allows each module to perform its specific function efficiently while keeping the overall circuit manageable and understandable.
Solution Approach 2:
The patent achieves universality by designing a bias voltage circuit that can handle the entire pad voltage range (-0.4V to 4.03V) for USB 2.0 applications. The circuit serves multiple purposes: protecting transistors from over-voltage, enabling wide voltage operation, and maintaining reliable circuit operation across all operating conditions without requiring separate protection circuits.
3Reliability
If the bias voltage is dynamically adjusted to meet maximum withstand voltage requirements, then the gate-to-drain voltage is controlled within safe limits, but the driving capability of the transistor may be reduced
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting the bias voltage parameter based on pad voltage conditions. The voltage divider ratio and buffer circuit characteristics are optimized to provide the maximum safe bias voltage at each pad voltage level, ensuring transistors operate at the boundary of safe operation rather than with excessive safety margins that would reduce driving capability.
Data Source
AI summary
A dynamic bias voltage circuit for providing a bias voltage includes: a buffer circuit, a voltage divider circuit and a voltage follower circuit. The buffer circuit is configured to output a second voltage according to a first voltage. The voltage divider circuit is coupled to the buffer circuit and configured to implement a voltage division function to provide a third voltage according to the second voltage and a pad voltage on a pad of the integrated circuit. The voltage follower circuit is coupled to the voltage divider circuit and configured to generate the bias voltage according to the third voltage.