Dynamic-Biased Cascode LNA for High Linearity in Low-Voltage CMOS

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Solution Overview

Problem

Highly sensitive and highly-linear low-noise amplifiers (LNAs) with high-output compression points are difficult to implement in low-voltage scaled CMOS technology due to larger output swings required for high-performance receivers, while using higher-voltage transistors results in higher noise figures and poorer sensitivity.

Innovation Solution

A cascode amplifier with a common-gate stage and dynamic biasing circuitry that dynamically biases the common-gate stage based on its output voltage, allowing the output voltage swing to be shared between the cascode and common-gate stages, enabling the use of lower-voltage devices while maintaining high sensitivity and output compression points.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If higher-voltage transistors are used to handle larger voltage swings, then output compression point is improved, but noise figure increases and sensitivity deteriorates

Engineering Contradiction:
Improveoutput compression pointVSAvoidnoise figure
Core Design Contradiction:
PowerVSObject-generated harmful factors

Solution Approach 1:

The LNA is divided into two separate stages: a cascode amplifier stage and a common-gate stage. Each stage operates with optimized voltage swings, allowing the first stage to maintain high sensitivity with lower voltage devices while the second stage handles the bulk of the voltage swing requirements, achieving high output compression point without degrading noise figure

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs dynamic biasing circuitry that adjusts the bias conditions of the common-gate stage based on the instantaneous output voltage swing. This dynamic adjustment allows the circuit to optimize the distribution of voltage swings between stages in real-time, maintaining high output compression point while preserving the low noise figure of the first stage

Inventive Principle:
Principle #15Dynamics

2Power

If higher-voltage transistors are used to handle larger voltage swings, then output compression point is improved, but sensitivity deteriorates

Engineering Contradiction:
Improveoutput compression pointVSAvoidsensitivity
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

The LNA is divided into two separate stages: a cascode amplifier stage and a common-gate stage. Each stage operates with optimized voltage swings, allowing the first stage to maintain high sensitivity with lower voltage devices while the second stage handles the bulk of the voltage swing requirements, achieving high output compression point without degrading noise figure

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs dynamic biasing circuitry that adjusts the bias conditions of the common-gate stage based on the instantaneous output voltage swing. This dynamic adjustment allows the circuit to optimize the distribution of voltage swings between stages in real-time, maintaining high output compression point while preserving the low noise figure of the first stage

Inventive Principle:
Principle #15Dynamics

3Object-generated harmful factors

If low-voltage devices are used, then noise figure is reduced and sensitivity is improved, but output compression point deteriorates

Engineering Contradiction:
Improvenoise figureVSAvoidoutput compression point
Core Design Contradiction:
Object-generated harmful factorsVSPower

Solution Approach 1:

The LNA is divided into two separate stages: a cascode amplifier stage and a common-gate stage. Each stage operates with optimized voltage swings, allowing the first stage to maintain high sensitivity with lower voltage devices while the second stage handles the bulk of the voltage swing requirements, achieving high output compression point without degrading noise figure

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The common-gate stage acts as an intermediary between the sensitive cascode amplifier and the output load. It buffers the output voltage swing requirements, allowing the first stage to operate with small voltage swings for low noise while the second stage handles the large voltage swings needed for high output compression point

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS7541875B2High-linearity low noise amplifier and method
Publication Date: 2009.06.02 TAHOE RES LTD
  • US7541875B2 patent drawing
  • US7541875B2 patent drawing
  • US7541875B2 patent drawing

AI summary

Embodiments of a high-linearity low-noise amplifier (LNA) and method are generally described herein. Other embodiments may be described and claimed. In some embodiments, an RF input signal may be amplified with a cascode amplifier and a common-gate stage. The common-gate stage is dynamically biased based on an output voltage of the common-gate stage to allow an output voltage swing to be shared between the cascode amplifier and the common-gate stage.