Dynamic Bit Line Voltage Control for Memory Cell Threshold Distribution

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Solution Overview

Problem

Nonvolatile memory devices, such as flash memory, face challenges in achieving uniform threshold voltage distribution during program operations, which affects the reliability of data retention and programming efficiency.

Innovation Solution

A memory device and method that involve a memory cell block with multiple pages, where a peripheral circuit and control logic adjust and set bit line voltages based on the program order of each page, gradually decreasing the voltage during program verify operations to ensure uniform threshold voltage distribution.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a fixed bit line voltage is applied during program verify operation, then the operation is simple, but the threshold voltage distribution becomes non-uniform

Engineering Contradiction:

Improvethreshold voltage distribution uniformityVSAvoidvoltage control complexity

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

The bit line voltage is changed dynamically based on the program order of each page. During program verify operations, the control logic adjusts the bit line voltage to different levels according to which page is being verified, transforming a static voltage system into a dynamic one that adapts to operational requirements to achieve uniform threshold voltage distribution

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent changes the voltage parameter of the bit line during program verify operations. By setting different bit line voltages for different program orders of pages, the system optimizes the verify operation for each page sequence, resulting in improved threshold voltage distribution uniformity across all pages

Inventive Principle:

Principle #35Parameter changes

2Reliability

If pages are programmed sequentially without voltage adjustment, then the control is simple, but drain and source resistance changes affect programming reliability

Engineering Contradiction:

Improveprogram operation reliabilityVSAvoidvoltage adjustment mechanism

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The control logic incorporates feedback about the program order of pages to adjust the bit line voltage during verify operations. This feedback mechanism allows the system to compensate for resistance changes that occur during sequential programming, maintaining reliable program operations across all pages

Inventive Principle:

Principle #23Feedback

Solution Approach 2:

The bit line voltage is pre-adjusted based on the anticipated program order of pages before the verify operation begins. This preliminary voltage setting compensates for expected resistance changes in drain and source, ensuring reliable programming without requiring complex real-time adjustments

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS11217317B2Memory device capable of improving a threshold voltage distribution of memory cells and method of operating the memory device

Publication Date: 2022.01.04 SK HYNIX INC

AI summary

A memory device according to an embodiment includes a memory cell block including a plurality of pages with each page corresponding to a word line of a plurality of word lines, a peripheral circuit configured to perform a program operation on the plurality of pages, and control logic configured to control the peripheral circuit to perform the program operation. The control logic changes and sets a bit line voltage applied to bit lines of the memory cell block during a program verify operation of the program operation according to a program order of each of the plurality of pages.