Dynamic Bit Positioning for EEPROM Write Endurance

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Solution Overview

Problem

Devices with limited write cycles in memory, such as wireless car keys, face premature failure due to the high write burden on memory locations, especially when using EEPROMs, which are non-volatile but withstand only a limited number of write cycles, leading to increased costs with redundant memory solutions.

Innovation Solution

The method involves periodically changing the physical storage location of bits in a binary count, using a bit value pattern of fixed bits as indicators for the changing bits, thereby reducing the need for additional memory and distributing the write burden evenly across all memory locations without requiring extra non-volatile storage for indicating the positions of changed bits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If redundant memory is used to avoid premature failure, then reliability is improved, but device cost increases

Engineering Contradiction:
Improvememory enduranceVSAvoidmemory size
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements dynamic bit positioning where the physical storage locations of count bits are periodically changed. Instead of static memory allocation, the system dynamically remaps logical bit positions to different physical memory locations, allowing the same physical memory to serve multiple logical positions over time, thereby extending effective endurance without adding redundant memory.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system performs periodic exchange of bit positions in the memory. After a certain number of write cycles, the physical locations storing individual bits are exchanged according to a predetermined pattern. This periodic reorganization distributes the write burden across all memory locations, effectively multiplying the memory's write endurance by the number of possible position configurations.

Inventive Principle:
Principle #19Periodic action

2Reliability

If additional bits are added to indicate bit positions after exchange, then reliability is improved, but memory size increases

Engineering Contradiction:
Improvebit position trackingVSAvoidmemory capacity
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent makes the count bits serve dual functions: they simultaneously represent the counter value and encode the position mapping information. By selectively positioning which bits are placed in which physical locations, the same bits that store the count value also implicitly indicate the current configuration, eliminating the need for separate indicator bits.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system merges the function of position indicators with the count bits themselves. Instead of having separate indicator bits alongside the count bits, the position information is embedded in the arrangement and positioning of the count bits within the memory structure, combining two functions into a single integrated system.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS8310347B2Incrementing counter with extended write endurance
Publication Date: 2012.11.13 TEXAS INSTRUMENTS INC
  • US8310347B2 patent drawing
  • US8310347B2 patent drawing
  • US8310347B2 patent drawing

AI summary

A method and device for writing a binary count of a length n to a memory having a limited number of write cycles, a physical storage location of bits (R-bits) of the count in the memory are periodically changed, fixed bits of the count are stored at fixed physical storage locations, and a bit value pattern of the fixed bits is used as an indicator for the physical storage locations of the changing bits (R-bits).