Dynamic Bit Line Voltage and Sense Time for 3D NAND Read Recovery

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Solution Overview

Problem

3D NAND flash memory devices face challenges in reading data accurately under extreme temperature conditions and die variations, leading to high fail bit counts and unacceptable reading errors, as existing solutions either degrade non-failing cells or fail to address temperature and die-to-die variations.

Innovation Solution

A method involving dynamic bit line voltage and sensing time adjustments, where the bit line voltage is increased by 50 mV and sense time by 200 ns in successive reads until successful or reaching a maximum, to enhance data recovery in 3D NAND flash memory devices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If default read is performed with fixed bit line voltage and sensing time, then reading speed is maintained, but data reading reliability deteriorates under extreme temperature conditions and die variations

Engineering Contradiction:
Improvedata reading reliabilityVSAvoidread operation complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies dynamics by transitioning from fixed bit line voltage and sensing time to dynamic adjustments. The read operation dynamically modifies bit line voltage (VBLC) and sensing time based on read success/failure feedback, allowing the system to adapt to temperature variations and die-to-die differences without requiring complex pre-characterization

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes physical parameters (bit line voltage and sensing time) to improve reliability. When a default read fails, the system increases VBLC in 50mV steps and extends sensing time in 200ns increments, directly modifying electrical and temporal parameters to overcome reading failures caused by extreme conditions and manufacturing variations

Inventive Principle:
Principle #35Parameter changes

2Reliability

If bit line voltage is increased to recover failed reads, then data reading reliability improves, but energy consumption increases

Engineering Contradiction:
Improvedata reading reliabilityVSAvoidenergy consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies partial action by increasing bit line voltage only when necessary (upon read failure) rather than maintaining high voltage continuously. The voltage increases in controlled 50mV steps only for affected reads, minimizing unnecessary energy consumption while still achieving reliable data recovery when needed

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The system uses feedback from read success/failure detection to control voltage increases. The read circuitry detects whether a default read succeeded or failed, and this feedback triggers selective voltage adjustments only for failed reads, optimizing the balance between reliability improvement and energy consumption

Inventive Principle:
Principle #23Feedback

3Reliability

If sensing time is extended to improve data recovery, then reading reliability improves, but productivity decreases

Engineering Contradiction:
Improvedata reading reliabilityVSAvoidreading speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies partial action by extending sensing time only for reads that fail the default read operation. Successful reads complete in the standard time, while only failed reads trigger extended sensing time in 200ns increments, minimizing the impact on overall reading speed while improving recovery of failed reads

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The sensing time transitions from a static fixed value to a dynamic parameter that adjusts based on read success. The system dynamically extends sensing time only when needed for failed reads, allowing the majority of successful reads to maintain high speed while providing enhanced recovery capability for problematic cases

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11250917B2Dynamic bit line voltage and sensing time enhanced read for data recovery
Publication Date: 2022.02.15 SANDISK TECHNOLOGIES LLC
  • US11250917B2 patent drawing
  • US11250917B2 patent drawing
  • US11250917B2 patent drawing

AI summary

A method and system are provided for reading a non-transitory memory array. When a default read operation is performed and has failed, a dynamic sensing bit line voltage (VBLC) enhanced read or a dynamic sense time read is performed. According to the dynamic VBLC enhanced read or the dynamic sense time enhanced read, the VBLC or the sense time is increased, and a read is performed with the increased VBLC or increased sense time. If this enhanced read is unsuccessful, and if a maximum VBLC or a maximum sense time has not yet been reached, the VBLC or the sense time is increased again, and another read is performed. Once the maximum VBLC or a maximum sense time has been reached, if the read is still not successful, a read failure is reported.