Dynamic Bitwise Switching for Emulation Interconnects
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Solution Overview
Problem
Conventional emulation systems have inefficient fixed interconnects between components, leading to wasteful resource utilization and inefficient communication due to unnecessary hops and dedicated connections that are seldom used.
Innovation Solution
Implementing dynamic bitwise switching and routing in logic board-level and system-level interconnects using switching ASICs that can route any bit of input data to any emulation ASIC, allowing for flexible and efficient data transmission across logic boards and clusters.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If fixed interconnects are used between emulation ASICs, then connection stability is improved, but resource utilization deteriorates due to unnecessary hops and seldom-used dedicated connections
Solution Approach 1:
The patent implements dynamic interconnects using switching ASICs that can reconfigure connections in real-time based on traffic demands. The switching fabric allows emulation ASICs to dynamically establish direct bit-level connections when needed, eliminating the need for fixed predetermined paths and enabling adaptive resource allocation across the emulation system.
Solution Approach 2:
The switching ASICs provide universal connectivity by enabling any emulation ASIC to communicate directly with any other emulation ASIC through dynamic connection establishment. This multi-functional switching fabric replaces multiple dedicated fixed connections with a single reconfigurable interconnect structure that can serve multiple communication pairs simultaneously.
2Reliability
If dedicated fat connections are established between specific emulation ASICs, then connection reliability is improved, but adaptability deteriorates as connections are seldom used
Solution Approach 1:
The system transitions from static dedicated connections to dynamic on-demand connections. The switching fabric establishes reliable direct connections only when needed for active communication pairs, allowing the system to adapt connection topology dynamically based on emulation workload requirements while maintaining connection reliability during active use.
Solution Approach 2:
The patent extracts the essential function of dedicated connections (reliable direct communication) and implements it dynamically only when required, rather than permanently provisioning all possible dedicated connections. This removes unnecessary fixed connections while preserving reliable communication paths during active use.
3Adaptability or versatility
If emulation ASICs are used for hopping data between source and target ASICs, then interconnect flexibility is improved, but productivity deteriorates due to wasted I/O resources
Solution Approach 1:
The patent introduces dedicated switching ASICs as intermediary components specifically designed for data routing functions. These switching ASICs assume the hopping function, allowing emulation ASICs to focus on their primary emulation tasks. The switching fabric provides direct bit-level routing through specialized intermediary components rather than using emulation ASICs for both computation and routing.
Solution Approach 2:
The system segments the interconnect function from the emulation function by introducing separate switching ASICs. This segmentation allows independent optimization of routing operations while preserving emulation resources for their primary purpose, improving overall system productivity by eliminating the dual-use inefficiency.
4Area of stationary object
If multiple hops are required for communication between emulation ASICs, then system coverage is improved, but communication speed deteriorates
Solution Approach 1:
The switching fabric dynamically establishes direct bit-level connections between communicating emulation ASICs, eliminating intermediate hops for active communication pairs. This dynamic path selection maintains comprehensive system coverage while achieving direct single-hop communication speed for all active connections based on real-time routing decisions.
Data Source
AI summary
Embodiments disclosed herein describe switching logic in board-level interconnects and in the system-level interconnects that may provide bitwise dynamic routing and switching between corresponding board-level and system-level components. At board-level, a switching ASIC may receive input data through a backplane from an emulation ASIC in a first logic board and route any bit of the input data to any of the emulation ASIC in a second logic board. At system-level, a switching logic board containing a set of switching ASICs may be associated with a logic cluster and may dynamically route data bits from the emulation ASICs in the logic cluster to emulation ASICs to other logic clusters of the emulation system and/or target systems. Additionally, the switching logic board may dynamically route bits from the other logic clusters to the associated logic cluster.