Dynamic Buffer Access Control for Stream Data Processing
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Solution Overview
Problem
Existing stream data processing systems face challenges with increased buffer size and extended memory occupancy time due to inflexible pipelined structures and inefficient data transfer protocols between stream and processor formats, particularly in multimedia SoCs and real-time data processing applications.
Innovation Solution
An electronic apparatus with a memory, stream input and output buffers, and a controller that dynamically manages access rights to optimize buffer usage and reduce memory occupancy time by prioritizing processor access, allowing flexible and efficient data conversion between stream and processor formats.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If pipelined fixed-functional modules are used for stream data processing, then real-time data processing capability is improved, but flexibility and adaptability to various vision processing algorithms deteriorate
Solution Approach 1:
The patent replaces static pipelined fixed-functional modules with a dynamic processor-based system that can adapt its processing mode according to different algorithms and data formats, enabling both real-time processing and flexibility
Solution Approach 2:
The patent introduces a universal processor that can handle multiple vision processing algorithms and data formats, replacing specialized fixed-functional modules while maintaining real-time processing capability through efficient memory access management
2Adaptability or versatility
If existing transfer protocols are used between stream data and processor data formats, then data format conversion is achieved, but buffer size increases and interface (buffer)-memory occupation time is extended
Solution Approach 1:
The patent performs data format conversion in advance within the stream input buffer before data enters the processor, eliminating the need for large buffers during processing and reducing memory occupation time
Solution Approach 2:
The patent extracts the data format conversion function from the main processing pipeline and performs it separately in the stream input buffer, allowing the processor to operate efficiently with converted data without waiting for format transformations
3Adaptability or versatility
If existing transfer protocols are used between stream data and processor data formats, then data format conversion is achieved, but interface (buffer)-memory occupation time is extended
Solution Approach 1:
The patent performs data format conversion in advance within the stream input buffer before data enters the processor, eliminating the need for large buffers during processing and reducing memory occupation time
Solution Approach 2:
The patent enables continuous data flow by performing format conversion in parallel with data input, ensuring the processor receives ready-to-process data without interruption or waiting time
Data Source
AI summary
An electronic apparatus includes: a memory configured to store data for computational processing of a processor; a stream input buffer configured to sequentially store input stream data that is input in a stream data format, convert the input stream data into a processor data format that is processable by the processor, and transmit, to the memory, the input stream data in the processor data format; the processor, which is configured to obtain, from the memory, the input stream data in the processor data format, and store, in the memory, computational processing result data for the input stream data in the processor data format; and a stream output buffer configured to store computational processing result data received from the memory in the processor data format, convert the computational processing result data into the stream data format, and sequentially output the computational processing result data in the stream data format.