Dynamic Buffer Allocation in Network Switch Memory

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Solution Overview

Problem

High-speed packet networks face challenges in managing buffer memory efficiently, leading to packet loss due to insufficient input buffer allocation and inefficient use of shared memory resources, especially when traffic loads vary.

Innovation Solution

A communication apparatus with multiple ports and a shared memory system that dynamically allocates additional space to input buffers when fully occupied, while monitoring overall memory occupancy, and discards packets when the maximum occupancy level is exceeded, applying a quota to each input buffer to prevent overflow.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If static buffer allocation is used for each interface, then buffer management is simple, but memory utilization is inefficient when traffic load varies

Engineering Contradiction:
Improvebuffer management simplicityVSAvoidmemory utilization efficiency
Core Design Contradiction:
Ease of manufactureVSQuantity of substance

Solution Approach 1:

The patent implements dynamic buffer allocation where the buffer size for each interface is adjusted based on current traffic load conditions. When traffic load increases, more buffer space is allocated to that interface; when traffic load decreases, buffer space is released back to the shared pool. This dynamic adjustment mechanism resolves the contradiction by making buffer management adaptive rather than static, improving memory utilization while maintaining manageable complexity through automated control.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent allows individual interfaces to temporarily exceed their allocated buffer quotas when necessary, using a quota-based system with overflow handling. This partial relaxation of strict allocation rules enables better traffic handling during peak loads while maintaining overall system stability, resolving the contradiction between simple management and efficient utilization by introducing controlled flexibility.

Inventive Principle:
Principle #16Partial or excessive action

2Quantity of substance

If shared memory is used with dynamic allocation, then memory utilization improves, but buffer management complexity increases

Engineering Contradiction:
Improvememory utilization efficiencyVSAvoidbuffer management complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent implements self-service mechanisms where the buffer management system automatically monitors traffic loads, allocates buffer space, and adjusts allocations without external intervention. The system self-regulates by detecting when interfaces need additional buffer space and when space can be reclaimed, reducing the perceived complexity for external users while maintaining efficient dynamic allocation internally.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent employs feedback mechanisms where the buffer management system continuously monitors buffer usage levels, traffic patterns, and allocation effectiveness. This feedback information is used to automatically adjust allocation decisions, ensuring optimal memory utilization while keeping management complexity manageable through data-driven automated control rather than complex manual processes.

Inventive Principle:
Principle #23Feedback

3Reliability

If input buffer is fully occupied, then packet loss occurs, but allocating more buffer space reduces memory availability for other interfaces

Engineering Contradiction:
Improvepacket loss preventionVSAvoidmemory availability for other interfaces
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent merges individual interface buffers into a shared memory pool that serves all interfaces collectively. This consolidation allows buffer space to be dynamically shared among interfaces based on current needs, preventing packet loss at any single interface while ensuring that memory remains available for other interfaces through automatic reallocation. The merged buffer approach resolves the contradiction by creating a flexible resource pool rather than fixed individual allocations.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent changes the buffer allocation parameter from fixed static values to dynamic values that adjust based on traffic load conditions. When an interface experiences high traffic and its buffer is fully occupied, the system increases its allocated buffer space parameter; when traffic subsides, the parameter is reduced to make space available for other interfaces. This parameter dynamicity resolves the contradiction between preventing packet loss and maintaining memory availability.

Inventive Principle:
Principle #35Parameter changes

4Productivity

If additional buffer space is allocated dynamically, then packet acceptance improves, but control and monitoring complexity increases

Engineering Contradiction:
Improvepacket acceptance capabilityVSAvoidcontrol and monitoring complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements self-service buffer management where the system automatically performs allocation, monitoring, and adjustment operations without external control. The buffer management mechanism autonomously detects when additional space is needed, allocates it from the shared pool, and monitors usage to ensure proper release. This self-service approach improves packet acceptance capability while managing control complexity internally through automation rather than external intervention.

Inventive Principle:
Principle #25Self-service

Data Source

PatentEP3249867B1Efficient use of buffer space in a network switch
Publication Date: 2020.08.26 MELLANOX TECH TLV
  • EP3249867B1 patent drawingFigure 1
  • EP3249867B1 patent drawingFigure 2
  • EP3249867B1 patent drawingFigure 3

AI summary

Communication apparatus (20) includes multiple ports (22) configured to serve as ingress ports (22A) and egress ports (22B) for connection to a packet data network (24). A memory (26) is coupled to the ports and configured to contain both respective input buffers (34) allocated to the ingress ports and a shared buffer (36) holding data packets for transmission in multiple queues via the egress ports. Control logic (32) is configured to monitor an overall occupancy level of the memory, and when a data packet is received through an ingress port having an input buffer that is fully occupied while the overall occupancy level of the memory is below a specified maximum, to allocate additional space in the memory to the input buffer and to accept the received data packet into the additional space.