Dynamic Buffer Distortion Correction for Low-Latency Image Processing

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional distortion correction methods are inadequate for image and video processing systems with stringent power and latency constraints, particularly in applications like man-portable displays and head-mounted displays, which require low latency and high video quality while maintaining minimal power consumption.

Innovation Solution

An image processor with a dynamically configurable distortion correction sub-system that includes a buffer sized proportionally to the distortion value and a data structure for mapping input pixels to output pixels, using a sparse matrix table to interpolate distortion correction values, allowing for real-time adaptation to scene and configuration parameters.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional distortion correction methods are used, then video quality is improved, but power consumption increases and latency increases

Engineering Contradiction:
Improvevideo qualityVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The distortion correction process is segmented into distinct functional blocks: a distortion correction block that performs the actual correction using a lookup table, and a separate buffer management system. This segmentation allows each block to be optimized independently for low power consumption while maintaining correction quality.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Distortion correction parameters are pre-calculated and stored in a lookup table before real-time processing. The lookup table contains pre-computed mapping relationships between distorted and corrected pixel positions, allowing the correction block to perform simple table lookups rather than complex calculations during video processing, significantly reducing power consumption.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If conventional distortion correction methods are used, then video quality is improved, but latency increases

Engineering Contradiction:
Improvevideo qualityVSAvoidlatency
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The distortion correction lookup table is pre-computed and stored, containing all necessary mapping information for correcting lens distortion. During real-time processing, the correction block performs rapid table lookups instead of complex mathematical calculations, dramatically reducing processing latency while maintaining high video quality.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The correction system is divided into specialized blocks with dedicated functions. The distortion correction block handles only the coordinate transformation using the lookup table, while buffer management is handled separately. This segmentation enables parallel processing and reduces overall system latency.

Inventive Principle:
Principle #1Segmentation

3Use of energy by moving object

If processing systems are made smaller to meet SWAP constraints, then power consumption is reduced and size is minimized, but processing effectiveness decreases

Engineering Contradiction:
Improvepower consumptionVSAvoidprocessing effectiveness
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The distortion correction block is designed with dynamic buffering capabilities where the buffer size adapts to the distortion magnitude. For images with small distortion values, the buffer is smaller, reducing memory usage and power consumption. For highly distorted images, the buffer expands automatically to maintain correction quality, ensuring processing effectiveness across varying conditions.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system dynamically adjusts buffer size based on the distortion parameter of the input image. This parameter-driven adaptation allows the processor to minimize resource usage for low-distortion images while allocating sufficient resources for high-distortion correction, maintaining processing effectiveness across different scenarios.

Inventive Principle:
Principle #35Parameter changes

4Quantity of substance

If buffer size is reduced to meet memory constraints, then power consumption is reduced and device size is minimized, but latency increases

Engineering Contradiction:
Improvememory sizeVSAvoidlatency
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The buffer size is made dynamic and adaptive to the actual distortion magnitude of each image. Rather than using a fixed large buffer that consumes excessive memory, the buffer automatically scales to the minimum necessary size for the current distortion level. This dynamic adaptation reduces memory usage and power consumption while maintaining low latency by avoiding unnecessary buffering operations.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10547849B1Low-power and low-latency distortion correction for image processors
Publication Date: 2020.01.28 ROCKWELL COLLINS INC
  • US10547849B1 patent drawing
  • US10547849B1 patent drawing
  • US10547849B1 patent drawing

AI summary

An image processing system incorporates a distortion correction (DC) sub-system in order to quickly correct skewed images. The DC sub-system includes a buffer, a processor and a sparse matrix table (SMT). The buffer is sized according to an amount of distortion in an input image. Input image pixels from an input frame are buffered in the buffer, and other input image pixels from the same frame overwrite the buffered input image pixels, reducing latency of the DC sub-system. The SMT is dynamically configurable and provides mapping values for mapping output pixels to input pixels. The processor implements combinational logic, including multipliers, lookup tables and adders. The combinational logic interpolates flow control parameters, pixel coordinate values, and pixel intensity values. The distortion correction values are streamed to a display or provided to a subsequent image processing block for further processing.