Dynamic Buffer Memory Allocation for Non-Volatile Storage
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Solution Overview
Problem
Existing memory management methods for rewritable non-volatile memory modules face inefficiencies in utilizing buffer memory space, leading to wasted resources and performance issues during data access operations, as they struggle to balance the needs of small range and random read data access without overloading the buffer memory.
Innovation Solution
A memory management method that dynamically configures the buffer memory into separate areas for loading address information and mapping tables based on operation modes, allowing for efficient storage and retrieval of data during both small range and overall test operations by optimizing the capacity allocation of the first and second buffer areas.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a space large enough to store all address information of logical-physical mapping tables is preserved in the buffer memory to avoid frequent loading, then data access speed for small range operations is improved, but buffer memory space utilization deteriorates when performing overall test operations for random read data
Solution Approach 1:
The buffer memory is divided into a first buffer area and a second buffer area that can be dynamically allocated based on operation modes. In the first operation mode, the first buffer area stores address information while the second buffer area stores mapping table data. In the second operation mode, the allocation is adjusted to accommodate different data ranges, enabling adaptive space utilization for both small range and overall test operations without wasting buffer memory resources.
Solution Approach 2:
The buffer memory is segmented into multiple functional areas (first buffer area for address information, second buffer area for mapping table data) that can be independently managed and allocated. This segmentation allows the system to optimize space utilization by assigning appropriate buffer areas to different data structures based on the specific operation mode, resolving the contradiction between maintaining fast access speed and avoiding space waste.
2Adaptability or versatility
If the buffer memory space is increased to accommodate all mapping tables for overall test operations, then random read performance is improved, but the space cannot be fully utilized during small range data access operations
Solution Approach 1:
The buffer memory allocation is made dynamic through mode-dependent configuration. The system switches between different buffer area allocations based on whether it is performing small range data access or overall test operations. This dynamic adaptation allows the same buffer memory to serve different operation modes efficiently without requiring excessive space that would remain underutilized during certain operations.
3Loss of energy
If address information of logical-physical mapping tables is frequently loaded from rewritable non-volatile memory module, then buffer memory space utilization is improved, but data access time increases
Solution Approach 1:
The system performs preliminary actions by pre-loading address information into the first buffer area before actual data access operations. This preliminary loading ensures that when data access is required, the address information is already available in the buffer memory rather than needing to be fetched from the rewritable non-volatile memory module during the access operation, thus reducing access time while maintaining efficient space utilization through mode-dependent allocation.
Solution Approach 2:
The address information is extracted from the rewritable non-volatile memory module and placed into the first buffer area for frequent access operations. This extraction separates the frequently accessed address information from the less frequently accessed mapping table data, allowing the system to optimize buffer space usage by keeping only necessary address information in the buffer during small range operations, thereby improving space utilization without significantly increasing access time.
Data Source
AI summary
A memory management method, a memory control circuit unit and a memory storage device are provided, wherein the memory storage device includes a rewritable non-volatile memory module and a buffer memory. The method includes: loading at least one first address information of at least one first logical-physical mapping table from the rewritable non-volatile memory module to a first buffer area when the memory storage device is operated in a first mode, wherein the first address information has a first data quantity; and loading at least one second address information of at least one second logical-physical mapping table from the rewritable non-volatile memory module to the first buffer area when the memory storage device is operated in a second mode, wherein the second address information has a second data quantity, and the first data quantity is less than the second data quantity.