Dynamic Buffering Circuit for Low-Voltage Noise Suppression
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Solution Overview
Problem
Modern electronic systems with low supply voltage face issues with noise-induced jitter and glitches due to insufficient voltage headroom in buffering circuits, which can lead to system malfunctions.
Innovation Solution
A buffering device comprising a buffering circuit, a controlling circuit, and a regenerative circuit that selectively outputs supply voltage or ground voltage based on input signal levels, using control signals to manage transitions and eliminate noise-induced glitches by configuring the regenerative circuit as a latching or inverting circuit depending on signal phases.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If a buffer is operated with low supply voltage, then power consumption is reduced, but noise-induced jitter and glitches increase
Solution Approach 1:
The patent applies dynamics by making the buffer's voltage supply configurable and time-varying. The buffer operates at low voltage during stable periods to reduce power consumption, and switches to high voltage during transition periods to suppress noise-induced jitter and glitches. This dynamic voltage adjustment resolves the contradiction between low power consumption and noise immunity.
Solution Approach 2:
The patent changes the voltage supply parameter dynamically based on signal transition detection. By detecting transitions at the input or output and adjusting the supply voltage accordingly, the system achieves low power consumption during stable operation while maintaining noise immunity during critical transition periods when jitter and glitches are most problematic.
2Use of energy by moving object
If voltage headroom is reduced to save power, then power consumption decreases, but noise suppression capability deteriorates
Solution Approach 1:
The patent implements periodic action by alternating between low-voltage operation and high-voltage noise suppression modes. The system periodically detects signal transitions and applies high voltage headroom only during the periods when noise suppression is critical (during transitions), while maintaining low voltage during stable periods. This periodic switching resolves the contradiction between power consumption and noise suppression capability.
Solution Approach 2:
The patent applies preliminary action by detecting signal transitions in advance and proactively switching to high-voltage mode before noise-induced jitter and glitches can occur. The transition detection mechanism triggers voltage headroom increase preemptively, ensuring noise suppression is available before harmful effects manifest, while maintaining low power consumption otherwise.
3Reliability
If voltage headroom is increased to suppress noise, then noise-induced jitter and glitches are reduced, but power consumption increases
Solution Approach 1:
The patent resolves this contradiction by making the voltage headroom dynamic rather than static. The buffer automatically adjusts its supply voltage based on real-time signal conditions, using high voltage only when noise suppression is needed during transitions, and low voltage during stable periods. This dynamic approach achieves reliable noise suppression without the continuous power penalty of always operating at high voltage.
Solution Approach 2:
The patent changes the supply voltage parameter adaptively based on signal transition detection. By monitoring the input or output signal for transitions and adjusting the voltage headroom accordingly, the system achieves optimal noise suppression during critical periods while minimizing power consumption during stable operation, resolving the contradiction between reliability and power usage.
Data Source
AI summary
A buffering device includes: a buffering circuit coupled between a first voltage source providing a first voltage level and a second voltage source providing a second voltage level, for selectively outputting an output signal with the first voltage level or the second voltage level according to an input signal; and a controlling circuit coupled to the buffering circuit, for generating a first control signal to disconnect the buffering circuit from the first voltage source and generating a second control signal to connect the buffering circuit to the second voltage source when the buffering circuit transits the output signal from the first voltage level to the second voltage level. The second voltage level is different from the first voltage level.


