Dynamic Bypass Scheduling via Data Dependency Graph Bonding

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Solution Overview

Problem

Existing data dependency graph (DDG) based scheduling techniques are limited in handling dynamic delays in modern computer architectures that permit dynamic by-pass execution, as they primarily support fixed delays and are not optimal for architectures where delays between instructions can change dynamically.

Innovation Solution

A method and system for configuring a DDG to perform dynamic by-pass scheduling by setting delays between by-pass pairs of nodes to 0, identifying and bonding nodes with the shortest critical path, and re-computing earliest times and critical paths to ensure that successor nodes are scheduled immediately after their predecessor nodes, thereby optimizing instruction scheduling in architectures with dynamic by-pass execution.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If fixed delay scheduling is used in DDG, then scheduling simplicity is maintained, but adaptability to dynamic by-pass execution is lost

Engineering Contradiction:
Improveadaptability to dynamic by-pass executionVSAvoidscheduling complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent applies dynamics by making the delay values in the DDG configurable and changeable during execution. Instead of fixed delays, the system allows dynamic adjustment of delays between instructions based on runtime conditions, enabling the scheduler to adapt to by-pass execution opportunities while maintaining a manageable scheduling framework

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameter of delay values from fixed to dynamic/configurable. By allowing delay parameters to be modified during execution based on whether by-pass execution occurs, the system achieves adaptability to dynamic architectures without fundamentally redesigning the entire scheduling mechanism

Inventive Principle:
Principle #35Parameter changes

2Loss of time

If all by-pass pairs are set to full delay, then scheduling safety is ensured, but execution time efficiency is reduced

Engineering Contradiction:
Improvetotal execution timeVSAvoidscheduling safety
Core Design Contradiction:
Loss of timeVSReliability

Solution Approach 1:

The patent applies preliminary action by pre-identifying by-pass pairs and pre-configuring them with configurable delays before execution begins. This allows the scheduler to optimize timing based on predicted by-pass opportunities while maintaining the ability to adjust delays dynamically, achieving both time efficiency and scheduling safety

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system dynamically adjusts delay values for by-pass pairs based on actual execution conditions. When by-pass execution is enabled, delays are reduced to minimize time loss; when by-pass is not possible, delays are increased to ensure safety, thus optimizing execution time while maintaining reliability

Inventive Principle:
Principle #15Dynamics

3Productivity

If critical path based scheduling is applied, then instruction scheduling optimization is achieved, but handling of dynamic delays becomes suboptimal

Engineering Contradiction:
Improveinstruction scheduling efficiencyVSAvoidhandling of dynamic delays
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The patent extends critical path based scheduling by making the critical path calculation dynamic. Instead of using fixed delay values, the system recalculates critical paths based on actual by-pass execution status, allowing optimized scheduling decisions that adapt to dynamic delay conditions while maintaining high productivity

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS7392516B2Method and system for configuring a dependency graph for dynamic by-pass instruction scheduling
Publication Date: 2008.06.24 META PLATFORMS INC
  • US7392516B2 patent drawing
  • US7392516B2 patent drawing
  • US7392516B2 patent drawing

AI summary

There is disclosed a method and system for configuring a data dependency graph (DDG) to handle instruction scheduling in computer architectures permitting dynamic by-pass execution, and for performing dynamic by-pass scheduling utilizing such a configured DDG. In accordance with an embodiment of the invention, a heuristic function is used to obtain a ranking of nodes in the DDG after setting delays at all identified by-pass pairs of nodes in the DDG to 0. From among a list of identified by-pass pairs of nodes, a node that is identified as being the least important to schedule early is marked as “bonded” to its successor, and the corresponding delay for that identified node is set to 0. Node rankings are re-computed and the bonded by-pass pair of nodes are scheduled in consecutive execution cycles with a delay of 0 to increase the likelihood that a by-pass can be successfully taken during run-time execution.