Dynamic Cache Partitioning for Leakage Power Reduction
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Solution Overview
Problem
In electronic devices, particularly mobile devices, cache leakage power dissipation is a significant issue due to the large number of on-chip transistors, leading to increased energy consumption and reduced battery runtime, as scaling down transistor supply voltage to reduce dynamic energy dissipation results in higher leakage energy dissipation.
Innovation Solution
A method to dynamically resize the cache memory by obtaining operating parameters such as cache hit-rate, miss-rate, and line ages, and power-gating regions of the cache to adjust its size based on these parameters, thereby reducing power consumption by moving valid cache lines between powered and powered-down regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If transistor supply voltage is scaled down to reduce dynamic energy dissipation, then dynamic power consumption is reduced, but leakage energy dissipation increases
Solution Approach 1:
The cache is divided into multiple partitions or regions that can be independently power-gated. This segmentation allows selective powering off of cache regions based on usage patterns, reducing overall leakage power while maintaining necessary cache functionality for active regions.
Solution Approach 2:
The cache power-gating configuration is dynamically adjusted based on runtime operating parameters such as cache hit-rate, miss-rate, and access patterns. The system transitions from a static cache configuration to a dynamic one where cache regions are selectively activated or deactivated to optimize the balance between dynamic and leakage power consumption.
2Loss of energy
If cache size is reduced to decrease leakage power, then leakage power dissipation is reduced, but cache performance deteriorates
Solution Approach 1:
The cache is partitioned into multiple regions that can be independently controlled. This allows the system to maintain a smaller effective cache size for power reduction while preserving performance by selectively keeping only the most frequently accessed cache regions active.
Solution Approach 2:
The system dynamically changes operational parameters including cache hit-rate thresholds, miss-rate thresholds, and power-gating configurations based on runtime monitoring. This allows adaptive adjustment of cache effectiveness to maintain performance while reducing leakage power.
3Productivity
If cache size is increased to improve cache efficiency, then cache hit-rate is improved, but leakage power consumption increases
Solution Approach 1:
The cache is divided into multiple partitions that can be independently power-gated. This segmentation enables the system to achieve high cache efficiency by keeping only the necessary partitions active, rather than powering the entire large cache, thereby reducing leakage power while maintaining cache performance.
Solution Approach 2:
Instead of powering the entire cache or no cache at all, the system applies partial power-gating to specific cache partitions based on actual usage needs. This partial action approach maintains sufficient cache efficiency for the application while avoiding the excessive leakage power that would result from keeping the full cache powered.
4Loss of energy
If power-gating is applied to cache regions to reduce power consumption, then leakage power is reduced, but cache access time may increase
Solution Approach 1:
The system monitors cache operating parameters and proactively power-gates cache regions before they are needed, based on predicted usage patterns. This preliminary action allows cache regions to be activated in advance when needed, reducing the access time penalty while still achieving power savings during periods of low utilization.
Solution Approach 2:
The system continuously monitors cache performance metrics including hit-rate and access patterns, and uses this feedback to dynamically adjust power-gating decisions. This feedback mechanism ensures that power-gating actions do not significantly degrade cache access time by adapting to actual cache usage behavior.
Data Source
AI summary
Systems, methods, and computer readable media to improve the operation of electronic devices that use integrated cache systems are described. In general, techniques are disclosed to manage the leakage power attributable to an integrated cache memory by dynamically resizing the cache during device operations. More particularly, run-time cache operating parameters may be used to dynamically determine if the cache may be resized. If effective use of the cache may be maintained using a smaller cache, a portion of the cache may be power-gated (e.g., turned off). The power loss attributable to that portion of the cache power-gated may thereby be avoided. Such power reduction may extend a mobile device's battery runtime. Cache portions previously turned off may be brought back online as processing needs increase so that device performance does not degrade.