Dynamic Cache Partitioning in Persistent Memory Modules

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Solution Overview

Problem

Existing memory modules with both volatile and non-volatile memory face inefficiencies due to static allocation of cache resources, which can lead to suboptimal performance in prioritizing read and write operations, especially in database workloads with varying access patterns and batched writes.

Innovation Solution

The cache on the memory module is dynamically partitioned between a read prefetch buffer and a write back cache based on monitoring read/write accesses and user-selected allocation, allowing for dynamic reassignment of cache lines to prioritize operations and combine writes into larger cache lines.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If cache is statically allocated between read prefetch buffer and write back cache, then device complexity is reduced and ease of operation is improved, but productivity deteriorates due to suboptimal performance in prioritizing read and write operations

Engineering Contradiction:
Improvememory access speedVSAvoidcache management complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements dynamic cache partitioning where the volatile memory cache is divided into a read prefetch buffer and a write back cache with sizes that can be adjusted based on workload characteristics. The system monitors access patterns and automatically reallocates cache space between read and write operations, allowing the cache configuration to adapt dynamically to changing workload demands rather than remaining static.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the parameter of cache allocation ratios based on detected workload patterns. When batched writes are detected, the write back cache size is increased; when read-heavy workloads are detected, the read prefetch buffer size is increased. This parameter adjustment optimizes memory access performance for different workload types without requiring manual intervention.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If cache is dynamically partitioned to prioritize read and write operations, then productivity is improved through enhanced data prefetching and write combining efficiency, but device complexity increases due to monitoring and dynamic reassignment mechanisms

Engineering Contradiction:
Improvedata prefetching efficiencyVSAvoidcache monitoring complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent incorporates feedback mechanisms where the system continuously monitors cache access patterns, read/write ratios, and workload characteristics. Based on this feedback, the system automatically adjusts the partitioning of cache memory between read prefetch buffer and write back cache. This closed-loop control enables the cache to self-optimize for different workload types without external intervention.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The cache management system performs self-service by automatically detecting workload patterns and reallocating cache space without requiring external control or manual configuration. The system monitors its own performance metrics and makes autonomous decisions about cache partitioning, combining writes into larger cache lines and prioritizing operations based on detected patterns.

Inventive Principle:
Principle #25Self-service

3Productivity

If cache is dynamically partitioned to combine writes into larger cache lines, then productivity is improved through reduced frequent writes to persistent memory, but device complexity increases due to write combining mechanisms

Engineering Contradiction:
Improvewrite operation efficiencyVSAvoidwrite combining complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements write combining functionality where multiple small write operations are merged into larger cache lines within the write back cache portion of volatile memory. Instead of immediately writing each small write operation to persistent memory, the system combines them into larger batches, reducing the frequency of persistent memory writes and improving overall write operation efficiency.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10599579B2Dynamic cache partitioning in a persistent memory module
Publication Date: 2020.03.24 INTEL CORP
  • US10599579B2 patent drawing
  • US10599579B2 patent drawing
  • US10599579B2 patent drawing

AI summary

Cache on a persistent memory module is dynamically allocated as a prefetch cache or a write back cache to prioritize read and write operations to a persistent memory on the persistent memory module based on monitoring read/write accesses and/or user-selected allocation.