Dynamic Cache Sizing for SSD Endurance and Speed Trade-offs

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Solution Overview

Problem

Solid state storage systems face challenges in optimizing cache size due to varying bit densities between cache and regular drive, leading to trade-offs between performance and endurance, as a larger cache size can exceed program and erase cycle limits, violating total bytes written requirements.

Innovation Solution

A process to dynamically adjust the cache size based on total bytes written requirements, allowing the cache to vary in size during a variable size mode to improve performance while ensuring the system does not exceed program and erase cycle limits, using a solid state storage controller to manage the cache and regular drive portions and adjust their sizes accordingly.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the cache size is increased to improve performance, then read and write speeds are improved, but the program and erase cycle limits are exceeded, violating total bytes written requirements

Engineering Contradiction:
Improveread and write speedsVSAvoidprogram and erase cycle limits
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent implements dynamic cache sizing where the cache size is not fixed but can be adjusted based on system conditions. The controller monitors usage patterns and modifies the cache size dynamically to balance performance needs against endurance constraints, allowing the system to adapt between speed and reliability requirements

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The invention changes the parameter of cache size from a static value to a variable that can be adjusted. By modifying the cache size parameter dynamically, the system optimizes the trade-off between performance (larger cache) and reliability (staying within P/E cycle limits), resolving the contradiction between these two opposing requirements

Inventive Principle:
Principle #35Parameter changes

2Productivity

If the cache size is increased to improve performance, then throughput is enhanced, but the cache capacity exceeds available space within the solid state storage media

Engineering Contradiction:
Improvesystem throughputVSAvoidcache capacity
Core Design Contradiction:
ProductivityVSVolume of stationary object

Solution Approach 1:

The system employs dynamic adjustment of cache size based on available space and performance requirements. The controller continuously monitors the balance between throughput needs and available storage capacity, adjusting the cache size parameter to maximize productivity without exceeding physical constraints of the solid state storage media

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10127157B2Sizing a cache while taking into account a total bytes written requirement
Publication Date: 2018.11.13 SK HYNIX INC
  • US10127157B2 patent drawing
  • US10127157B2 patent drawing
  • US10127157B2 patent drawing

AI summary

A total bytes written (TBW) requirement associated with solid state storage is obtained. A size of a cache associated with the solid state storage is determined based at least in part on the TBW requirement. The size of the cache is adjusted to be the determined size