Dynamic Charge Pump Configuration for Non-Volatile Memory
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Solution Overview
Problem
Current semiconductor processing systems face challenges in generating controlled and programmable medium and high voltage pulses for non-volatile memory bitcells, requiring efficient power management and reduced ripple, while also needing to program multiple bitcells in parallel with maintained pulse integrity and minimized power and area consumption.
Innovation Solution
The system dynamically configures the number of charge pump cells and adjusts pump capacitor values in medium and high voltage charge pumps to match the current load, enabling efficient operation by computing the number of bitcells to be programmed after each pulse and optimizing impedance, thereby reducing stabilizing capacitance and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If a larger stability capacitor is used to reduce ripple during programming, then ripple is reduced, but power and area consumption increase
Solution Approach 1:
The charge pump system dynamically reconfigures the number of active charge pump cells based on the number of bitcells being programmed. This dynamic adjustment allows the system to use only the necessary pumping strength for each programming operation, reducing the need for large stability capacitors and minimizing both ripple and power consumption simultaneously
Solution Approach 2:
The system changes the operational parameters of the charge pump by adjusting the number of active cells and pump capacitor values based on programming requirements. This parameter adaptation allows optimal ripple reduction with minimal capacitance and power consumption
2Productivity
If more bitcells are programmed in parallel to speed up NVM testing, then productivity increases, but pulse integrity deteriorates due to increased overshoot and ripple
Solution Approach 1:
The charge pump system dynamically adjusts the number of active charge pump cells based on the number of bitcells being programmed in parallel. This dynamic reconfiguration ensures that the pumping strength matches the load requirements, maintaining pulse integrity even when programming multiple bitcells simultaneously
Solution Approach 2:
The system uses feedback from the number of bitcells to be programmed to automatically configure the charge pump strength. This feedback mechanism ensures optimal pulse delivery for any parallel programming configuration, preventing overshoot and ripple while maintaining productivity
3Device complexity
If fixed charge pump configuration is used for all programming operations, then device complexity is reduced, but adaptability to different programming requirements deteriorates
Solution Approach 1:
The charge pump system implements dynamic reconfiguration of the number of active cells based on programming requirements. This dynamic capability provides adaptability to different programming scenarios without requiring overly complex fixed configurations, achieving a balance between simplicity and versatility
Solution Approach 2:
The charge pump system is designed to perform multiple programming functions by dynamically adjusting its configuration. A single charge pump structure can adapt to different numbers of bitcells and programming requirements, providing universal functionality without needing multiple dedicated circuits
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for precise control of programming pulses, minimizing ripple and overshoot, and enabling efficient operation by dynamically adjusting the charge pump strength before each pulse, thus improving data retention and reducing power consumption.
Implementation Method 1
smart charge pump configuration for non-volatile memories
Data Source
AI summary
A semiconductor memory device includes a non-volatile memory, a memory controller, and a charge pump system. The memory controller establishes first parameters for a first programming cycle of a first plurality of memory cells of the non-volatile memory prior to the first programming cycle being performed. The charge pump system includes a plurality of charge pumps and provides a first programming pulse for use in performing the first program cycle. The first programming pulse is provided by selecting, according to the first parameters, which of the plurality of charge pumps are to be enabled during the first program cycle and which are to be disabled during the first program cycle.


