Dynamic Circuit Debugging via Integrated Logic Analyzer Controller

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Solution Overview

Problem

Debugging circuits in programmable ICs, such as FPGAs, is a time-consuming process due to the need for iterative re-synthesis and re-implementation of circuit designs, with existing methods being passive and requiring extensive offline analysis.

Innovation Solution

A system that includes a logic analyzer controller within the IC, allowing real-time control of the circuit under test through debug commands from a host computing system, enabling dynamic control of clock circuitry, reset circuitry, and injection of values onto data signals, thereby reducing the need for repeated iterations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Extent of automation

If a logic analyzer is implemented within the IC to capture signal states, then signal states can be stored locally and offloaded for analysis, but the logic analyzer operates passively and cannot dynamically control the circuit under test

Engineering Contradiction:
Improveautomation of signal captureVSAvoiddynamic control capability
Core Design Contradiction:
Extent of automationVSEase of operation

Solution Approach 1:

The patent combines the logic analyzer functionality with a controller that can actively control the circuit under test. The controller integrates both passive signal capture capabilities and active control capabilities (clock control, reset control, value injection) into a single unified system, eliminating the need for separate passive analysis tools.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The logic analyzer controller is designed to perform multiple functions: it can capture signal states, control clock signals, control reset signals, and inject values onto data signals. This multi-functional controller replaces the need for multiple separate tools and provides both automated capture and dynamic control capabilities.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If iterative re-synthesis and re-implementation of circuit designs is performed to test modifications, then error corrections can be verified, but the debugging process becomes time-consuming requiring hours or days per iteration

Engineering Contradiction:
Improveerror verification accuracyVSAvoiddebugging iteration time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The controller enables preliminary testing of circuit modifications by allowing dynamic control of clock signals, reset signals, and data signal values during circuit operation. This eliminates the need to perform full re-synthesis and re-implementation iterations, as modifications can be tested in-real-time by controlling signal values directly.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system transitions from static, iterative debugging (requiring full re-implementation cycles) to dynamic, real-time debugging. The controller can dynamically change clock frequencies, reset states, and data values during circuit operation, allowing rapid verification of modifications without repeating the entire synthesis and implementation process.

Inventive Principle:
Principle #15Dynamics

3Stability of the object's composition

If the logic analyzer only passively captures and stores signal states, then the circuit operation is not disturbed, but the ability to dynamically control and analyze circuit behavior in real-time is limited

Engineering Contradiction:
Improvecircuit operation stabilityVSAvoidreal-time analysis capability
Core Design Contradiction:
Stability of the object's compositionVSProductivity

Solution Approach 1:

The controller provides feedback control by monitoring circuit signals and using that information to dynamically adjust clock signals, reset signals, and data signal values. This closed-loop approach maintains circuit stability while enabling active control and real-time analysis, as the controller can respond to observed circuit behavior and make adjustments accordingly.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS10816598B1Dynamic debugging of circuits
Publication Date: 2020.10.27 XILINX INC
  • US10816598B1 patent drawing
  • US10816598B1 patent drawing
  • US10816598B1 patent drawing

AI summary

A system for debugging circuits includes an integrated circuit configured to implement a circuit under test and a logic analyzer controller coupled to the circuit under test. The system includes a host computing system configured to communicate with the logic analyzer controller and provide a debug command to the logic analyzer controller. The logic analyzer controller, in response to the debug command, controls operation of the circuit under test.