Dynamic Clamp Ratio PFC Circuit for THD Reduction
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Solution Overview
Problem
Existing power factor correction (PFC) circuits face challenges in reducing the size of energy storage components while maintaining low total harmonic distortion (THD) and power factor (PF), especially as input AC voltage varies, due to phase shifting caused by EMI capacitors.
Innovation Solution
A control circuit for PFC circuits that includes a peak value sample-hold unit, a clamp unit, a selecting unit, a current comparator, and a controller to generate control signals for a power switch, allowing for dynamic adjustment of the peak current reference signal based on line voltage sense and clamp signals, thereby optimizing current flow and reducing THD and improving PF.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If a clamp circuit is used to limit the peak value of current in boundary mode to reduce the size of the energy storage component, then the size of the energy storage component is reduced, but the total harmonic distortion (THD) and power factor (PF) worsen
Solution Approach 1:
The patent implements dynamic adjustment of the clamp ratio based on input AC voltage levels. The control circuit dynamically selects between different clamp ratios (first clamp ratio for low voltage, second clamp ratio for high voltage) rather than using a fixed clamp ratio, allowing the system to adapt to varying input conditions and maintain optimal THD and PF performance across different operating points while still achieving energy storage component size reduction
Solution Approach 2:
The patent changes the operational parameters by introducing multiple clamp ratios that are selectively applied based on input voltage conditions. The control circuit modifies the clamp circuit's behavior by adjusting the clamp ratio parameter dynamically, switching between different parameter sets (first and second clamp ratios) to optimize performance under different input AC voltage scenarios
2Measurement precision
If the clamp ratio is kept constant, then the total harmonic distortion (THD) is maintained constant as input AC voltage varies, but the power factor (PF) worsens when input AC voltage is high due to phase shifting caused by the EMI capacitor
Solution Approach 1:
The patent transitions from a static clamp ratio approach to a dynamic one where the clamp ratio is adjusted based on input AC voltage detection. The control circuit dynamically switches between first and second clamp ratios according to whether the input voltage is below or above a reference level, enabling the system to maintain both THD consistency and PF performance across the full input voltage range
Solution Approach 2:
The patent implements a feedback mechanism where the control circuit continuously monitors the input AC voltage level and uses this information to adjust the clamp ratio accordingly. The detection of input voltage triggers appropriate clamp ratio selection, creating a closed-loop control system that responds to changing conditions and maintains optimal performance
Data Source
AI summary
A power factor correction circuit including a rectifier bridge, an energy storage component, a power switch, a second switch and a control circuit provides reduced THD and improved PF performance under a high input AC voltage.