Dynamic Clock Arbiter for Shared Resource Access in Multi-Clock SoC
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Solution Overview
Problem
Modern electronic devices face challenges in power efficiency and performance when multiple processors access shared resources, as existing methods either sacrifice power efficiency or performance by using a common clock frequency that does not account for varying bandwidth requirements of different processors.
Innovation Solution
A system that dynamically adjusts the clock frequency for accessing a shared resource based on the processor's bandwidth requirements, allowing high-bandwidth processors to operate at a high frequency for performance and low-bandwidth processors to operate at a lower frequency for power efficiency, using clock circuitry and a clock arbiter to manage access.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a common clock frequency is used for all processors accessing shared resources, then system simplicity is maintained, but power efficiency deteriorates because low-bandwidth processors cannot operate at lower frequencies
Solution Approach 1:
The patent segments the clock frequency control by creating separate clock domains for different processors. Each processor can operate in its own clock domain with independently controllable frequency, allowing low-bandwidth processors to use lower frequencies while high-bandwidth processors use higher frequencies, thus resolving the power efficiency issue without requiring complex system-wide frequency management
Solution Approach 2:
The patent implements dynamic clock frequency adjustment by introducing a clock arbiter that can change the clock frequency assigned to each processor based on real-time bandwidth requirements. This dynamic adaptation allows the system to optimize power consumption by lowering frequencies when high performance is not needed, while maintaining simplicity through automated arbitration
2Productivity
If a high clock frequency is used to satisfy high-bandwidth processor requirements, then performance is improved, but power consumption increases unnecessarily for low-bandwidth processors
Solution Approach 1:
The patent applies local quality by allowing different processors to have different clock frequencies tailored to their specific bandwidth requirements. High-bandwidth processors receive high frequencies for maximum productivity, while low-bandwidth processors receive lower frequencies to minimize power consumption, with the clock arbiter making local decisions about frequency allocation based on current access patterns
Solution Approach 2:
The patent changes the frequency parameter dynamically based on processor needs. The clock arbiter monitors bandwidth requirements and adjusts the clock frequency parameter accordingly, increasing it for high-bandwidth operations to maintain productivity and decreasing it for low-bandwidth operations to reduce power consumption
3Use of energy by moving object
If a low clock frequency is used to reduce power consumption, then power efficiency is improved, but performance deteriorates for high-bandwidth processors
Solution Approach 1:
The patent uses dynamic frequency adjustment to prevent performance deterioration. When a high-bandwidth processor needs to access shared resources, the clock arbiter detects this need and dynamically increases the clock frequency for that processor, ensuring adequate data transfer rate while maintaining low power consumption during low-bandwidth periods
Data Source
AI summary
A request from a first processor for access to a shared resource in a computing system is received, and access is provided to the shared resource by the first processor at a first clock frequency. A request from a second processor for access to a shared resource in a computing system is received, and access is provided to the shared resource by the second processor at a second clock frequency that is lower than the first clock frequency.