Dynamic Clock Frequency Adjustment for Wireless Communication Power Reduction

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Solution Overview

Problem

Current wireless communication devices consume excessive power due to fixed clock frequencies, even when data rates are lower than the maximum supported, leading to increased power usage despite reduced data transmission needs.

Innovation Solution

A communication method and system that dynamically adjusts the clock frequency of components in the signal transmitter and receiver circuits based on the data rate of data packets, setting higher frequencies for higher data rates and lower frequencies for lower data rates to optimize power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the clock frequency is set to the highest data rate in the physical layer, then the data transmission capability is improved, but the power consumption increases

Engineering Contradiction:
Improvedata transmission capabilityVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic clock frequency adjustment by monitoring the actual data rate of transmitted packets and adjusting the clock frequency of components along the data path accordingly. When data rate decreases, the clock frequency is reduced proportionally, making the system adaptive rather than static. This resolves the contradiction by allowing the system to operate at high performance when needed while conserving energy during low-activity periods.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the operational parameters (clock frequency) of communication components based on the actual data transmission requirements. By adjusting the clock frequency parameter dynamically rather than maintaining a fixed high value, the system achieves both high data transmission capability when required and reduced power consumption when data rates are lower, directly resolving the technical contradiction.

Inventive Principle:
Principle #35Parameter changes

2Ease of operation

If a fixed clock frequency is used for all data rates, then the system operation is simplified, but unnecessary power consumption occurs when data rate is lower than maximum

Engineering Contradiction:
Improvesystem operation simplicityVSAvoidunnecessary power consumption
Core Design Contradiction:
Ease of operationVSLoss of energy

Solution Approach 1:

The system transitions from a static fixed clock frequency approach to a dynamic adjustment mechanism that automatically adapts to actual data transmission needs. The clock frequency is adjusted based on the monitored data rate, eliminating unnecessary power consumption during low-activity periods while maintaining operational simplicity through automated control.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system performs self-adjustment by automatically monitoring its own data transmission rate and adjusting the clock frequency accordingly without external intervention. This self-service mechanism eliminates the need for complex manual configuration while preventing energy waste, resolving the contradiction between operational simplicity and energy efficiency.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS11039396B2Communication method, signal transmitter circuit, and signal receiver circuit capable of reducing power consumption
Publication Date: 2021.06.15 REALTEK SEMICON CORP
  • US11039396B2 patent drawing
  • US11039396B2 patent drawing
  • US11039396B2 patent drawing

AI summary

A communication method includes the following steps: acquiring a data rate of a data packet; setting a clock frequency of at least one component disposed along a data transmitting path or a data receiving path of a communication system according to the data rate of the data packet, and processing the data packet after the clock frequency of the at least one component disposed along the data transmitting path or the data receiving path of the communication system is set. When the data packet has a higher data rate, the clock frequency of the at least one component is set to a higher clock frequency. When the data packet has a lower data rate, the clock frequency of the at least one component is set to a lower clock frequency.