Dynamic Clock Frequency Allocation for Multi-Core Systems

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Solution Overview

Problem

In computers with multiple computing cores, especially virtual currency mining machines, the uniform clock frequency provided by a single clock frequency unit limits the performance of stronger cores while ensuring weaker cores operate, leading to suboptimal computing power and high power consumption due to the need for increased voltage.

Innovation Solution

Implementing a method that uses both a main clock frequency unit and auxiliary clock frequency units to dynamically adjust clock frequencies for computing cores based on performance, switching cores with lower pass rates to auxiliary units to optimize overall computing power and reduce power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a single clock frequency unit provides a uniform clock frequency for all computing cores, then all cores can operate normally with stable system performance, but the computing power is limited and power consumption increases due to voltage requirements

Engineering Contradiction:
Improvesystem operating stabilityVSAvoidcomputing power
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent divides the single clock frequency unit into multiple independent clock frequency units (main clock frequency unit and auxiliary clock frequency units). Each unit can provide different clock frequencies to different computing cores, allowing cores with different performance capabilities to operate at optimal frequencies without compromising system stability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different clock frequencies to different computing cores based on their individual performance characteristics. High-performance cores receive higher clock frequencies from the main clock frequency unit, while lower-performance cores receive appropriate frequencies from auxiliary clock frequency units, optimizing each core's operating conditions locally.

Inventive Principle:
Principle #3Local quality

2Reliability

If the clock frequency is determined according to the computing core with the lowest computing power, then all cores can operate normally, but the remaining cores cannot achieve the highest computing power

Engineering Contradiction:
Improvenormal operation of all coresVSAvoidcomputing power of remaining cores
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments the clock frequency provision system into multiple independent units, each capable of providing different frequency levels. This allows the system to provision appropriate frequencies to different cores based on their capabilities rather than being constrained by the lowest-performing core.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the clock frequency parameter dynamically assigned to different computing cores based on their performance characteristics. Instead of using a uniform frequency determined by the weakest core, each core receives a frequency parameter optimized for its capabilities, thereby maximizing overall system computing power.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If the operating voltage is increased to improve computing power, then the computing power increases, but the power consumption increases correspondingly

Engineering Contradiction:
Improvecomputing powerVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent changes the clock frequency parameter as an alternative to increasing voltage. By providing optimized clock frequencies to different computing cores through multiple clock frequency units, the system achieves higher computing power without the corresponding increase in power consumption that would result from voltage increases.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12140991B2Method for providing clock frequencies for computing cores, chip and data processing device
Publication Date: 2024.11.12 SHENZHEN MICROBT ELECTRONICS TECH CO LTD
  • US12140991B2 patent drawing
  • US12140991B2 patent drawing
  • US12140991B2 patent drawing

AI summary

The present disclosure relates to a method for providing clock frequencies for computing cores, a chip and a data processing device. The method includes: causing a main clock frequency unit to provide a first main clock frequency for computing cores; testing the computing cores operating at the first main clock frequency to determine whether a pass rate of the computing cores is greater than an upper threshold or less than a lower threshold; when the pass rate is less than the lower threshold, causing an auxiliary clock frequency unit to provide a lower first auxiliary clock frequency for computing cores abnormally operating, causing the main clock frequency unit to providing the first main clock frequency for the remaining computing cores; when the pass rate is greater than the upper threshold, causing the main clock frequency unit to provide a higher second main clock frequency for the computing cores.