Dynamic Clock Rate Adjustment for EMV Chip Communication

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Solution Overview

Problem

Electronic transaction processing systems, particularly those using EMV cards, face inefficiencies in transaction speed due to fixed clock rates, which can lead to increased wait times and errors, as they rely on external power and clock sources, limiting the ability to adapt to varying conditions such as card types, transaction types, and environmental factors.

Innovation Solution

A payment terminal dynamically adjusts the clock rate provided to the EMV chip by monitoring performance and adjusting the clock rate based on factors like error rates, transaction types, and environmental conditions, allowing for optimized transaction processing speed without restarting transactions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a fixed clock rate is used for EMV chip communication, then device complexity is reduced and ease of operation is improved, but transaction processing speed decreases and productivity is reduced

Engineering Contradiction:
Improvetransaction processing speedVSAvoidclock rate control complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements dynamic clock rate adjustment by allowing the payment terminal to vary the clock signal frequency provided to the EMV chip based on transaction requirements and environmental conditions, transforming the static clock rate system into an adaptive one that optimizes processing speed while maintaining compatibility

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the clock rate parameter dynamically during transaction processing, adjusting the frequency of the clock signal based on factors such as card type, transaction type, and environmental conditions to optimize communication speed without requiring complex structural modifications

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If a fixed clock rate is used for EMV chip communication, then reliability is improved through consistent timing, but adaptability to varying conditions deteriorates

Engineering Contradiction:
Improveadaptation to card types and environmental conditionsVSAvoidcommunication stability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The payment terminal monitors communication quality and performance metrics during EMV transactions, using this feedback to dynamically adjust the clock rate, ensuring optimal performance across different card types and environmental conditions while maintaining reliable communication

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system transitions from a static clock rate to a dynamic one that adapts to different EMV card types, transaction types, and environmental conditions, enabling the system to optimize performance for each specific scenario while maintaining communication stability through controlled adjustment

Inventive Principle:
Principle #15Dynamics

3Productivity

If the clock rate is increased to speed up transaction processing, then productivity is improved, but error rates increase and reliability deteriorates

Engineering Contradiction:
Improvetransaction processing speedVSAvoiderror rate
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements dynamic clock rate adjustment by allowing the payment terminal to vary the clock signal frequency provided to the EMV chip based on transaction requirements and environmental conditions, transforming the static clock rate system into an adaptive one that optimizes processing speed while maintaining compatibility

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The payment terminal monitors communication quality and performance metrics during EMV transactions, using this feedback to dynamically adjust the clock rate, ensuring optimal performance across different card types and environmental conditions while maintaining reliable communication

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS10255464B2Systems and methods for determining clock rates for communicating with processing devices
Publication Date: 2019.04.09 BLOCK INC
  • US10255464B2 patent drawing
  • US10255464B2 patent drawing
  • US10255464B2 patent drawing

AI summary

A payment terminal such as a payment reader may receive and form electrical connections with an electronic transaction card such as an EMV chip card. The payment terminal may provide a clock signal at a rate that exceeds a specified rate for the EMV chip card. The payment terminal may transmit messages to the EMV chip card and monitor receive messages at a data connection. The payment terminal may determine that the clock rate is excessive based on a timeout of a receive message, an error rate of a receive message, or a receive message indicating that one of the transmit messages was not received by the EMV card. The payment terminal may reduce the clock rate to a rate that is below the specified rate for the EMV chip card.