Dynamic Clock and Voltage Control for Processor Power Optimization

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Solution Overview

Problem

Existing processor systems face challenges in reducing power consumption while maintaining required processing capabilities, as simply controlling clock signals is insufficient to achieve significant power reduction.

Innovation Solution

A processor system that includes a measurement unit to determine the instruction-execution rate, a clock controller to adjust clock frequencies based on this rate, and a voltage controller to manage source and threshold voltages accordingly, optimizing power consumption by dynamically adjusting frequencies and voltages across the processor, external memory, and bus controller.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If clock signals are controlled to reduce processor power consumption, then power consumption decreases, but processing capability deteriorates

Engineering Contradiction:
Improveprocessor power consumptionVSAvoidprocessing capability
Core Design Contradiction:
Use of energy by moving objectVSProductivity

Solution Approach 1:

The system dynamically adjusts clock frequencies of the processor, external memory, and bus controller based on real-time instruction execution rate measurements. The clock controller receives measurement results from the measurement unit and automatically varies clock frequencies to match actual processing demands, enabling power consumption reduction without sacrificing required processing capability.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes operational parameters (clock frequencies and voltages) of different system components based on measured instruction execution rates. When execution rates are low, clock frequencies and voltages are reduced; when execution rates are high, they are increased, thereby optimizing the balance between power consumption and processing capability through parameter adaptation.

Inventive Principle:
Principle #35Parameter changes

2Use of energy by moving object

If only clock signal supply is controlled to reduce power consumption, then power consumption decreases slightly, but significant power reduction cannot be achieved

Engineering Contradiction:
Improvepower consumption reductionVSAvoidcontrol system complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The system segments power control into multiple independent components: the measurement unit measures instruction execution rates, the clock controller adjusts clock frequencies, and the voltage controller adjusts supply voltages. This segmentation allows each component to be optimized independently while working together to achieve significant power consumption reduction through coordinated control of both clock signals and voltages.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system merges clock frequency control with voltage control to achieve comprehensive power management. By combining these two control mechanisms and coordinating their operation based on instruction execution rates, the system achieves greater power consumption reduction than either control method could achieve alone, while maintaining processing capability.

Inventive Principle:
Principle #5Merging (Combining)

3Use of energy by moving object

If clock frequencies of all components are reduced uniformly, then power consumption decreases, but system performance deteriorates

Engineering Contradiction:
Improvepower consumptionVSAvoidsystem performance
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The system applies different clock frequency adjustments to different system components based on their specific roles and the measured instruction execution rate. The processor, external memory, and bus controller each receive customized clock frequency settings from the clock controller, allowing optimal power consumption reduction in each component without compromising overall system performance or reliability.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS7840823B2Processor system for varying clock frequency and voltage in response to a comparison of instruction execution rate to a reference value
Publication Date: 2010.11.23 PANASONIC HOLDINGS CORP
  • US7840823B2 patent drawing
  • US7840823B2 patent drawing
  • US7840823B2 patent drawing

AI summary

A processor system includes a processor which has an internal memory, an external memory, and a bus controller which controls a bus to which the processor and the external memory are connected. The processor system also includes a measurement unit for measuring an instruction-execution rate of the processor, a clock controller for supplying the processor, the external memory, and the bus controller with clock signals having clock frequencies corresponding to the instruction-execution rate measured by the measurement unit, respectively, and a voltage controller for controlling a source voltage or a threshold voltage which are supplied to the processor, the external memory, and the bus controller, in accordance with the respective clock frequencies of the clock signals supplied to the processor, the external memory, and the bus controller.