Dynamic CNN Buffer Addressing to Reduce Bank Collisions
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Solution Overview
Problem
Existing hardware accelerators for Convolutional Neural Networks (CNNs) face challenges in maintaining consistent data input rates due to varying input data dimensionality across layers, leading to inefficiencies in data throughput and processing speed.
Innovation Solution
Implementing a dynamic addressing scheme that allocates input data to memory banks based on format parameters of input data and filters, ensuring even distribution and minimizing bank collisions, thereby optimizing data retrieval for each layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a fixed addressing scheme is used to store input data in the buffer, then data can be stored efficiently for some layers, but the addressing scheme becomes inappropriate for data formats of other layers with different dimensionality
Solution Approach 1:
The patent implements a dynamic addressing scheme where memory addresses are calculated based on the specific format parameters of each layer (input data dimensions, filter dimensions, stride values). The address calculation function adapts its behavior according to the layer being processed, allowing the same buffer to be optimized for different layer requirements without requiring separate buffers for each layer type.
Solution Approach 2:
The addressing scheme changes the parameter values used in address calculation based on the layer's format parameters. Different layers with different dimensionality requirements result in different address calculation parameters, enabling the system to optimize data storage and retrieval for each specific layer's requirements while using a single unified buffer structure.
2Productivity
If input data is buffered to maintain consistent data input rate, then throughput is improved, but bank collisions occur when multiple data values need to be accessed from the same memory bank simultaneously
Solution Approach 1:
The memory buffer is divided into multiple memory banks, and the addressing scheme is designed to distribute different data values across different banks. By segmenting the data access pattern across multiple banks, the system reduces bank collisions and enables parallel data retrieval operations, improving both throughput and reliability.
Solution Approach 2:
The dynamic addressing scheme acts as an intermediary between the data storage buffer and the data retrieval process. It calculates optimized addresses that distribute data access across multiple banks, mediating the conflict between high throughput requirements and bank collision avoidance by translating layer format parameters into collision-free address patterns.
3Device complexity
If a single buffer structure is used for all layers, then device complexity is reduced, but data retrieval efficiency varies across layers with different dimensionality requirements
Solution Approach 1:
The patent creates a universal buffer structure that serves multiple layer types through a single addressing scheme. Instead of requiring separate buffers for different layer formats, the system uses one buffer with a flexible address calculation mechanism that adapts to various layer requirements, achieving both simplicity and multi-functionality.
Solution Approach 2:
The addressing scheme uses variable parameters that change based on the layer being processed. By adjusting address calculation parameters according to layer format requirements (input data dimensions, filter dimensions, stride values), the single buffer structure achieves optimal data retrieval efficiency for each layer type without requiring multiple specialized buffers.
Data Source
AI summary
Hardware logic for implementing a convolutional neural network (CNN) is configured to receive input data values to be processed in a layer of the CNN. Addresses in banked memory of a buffer in which the received input data values are to be stored are determined based upon format data indicating a format parameter of the input data in the layer and indicating a format parameter of a filter which is to be used to process the input data in the layer, wherein the format parameter of the filter comprises a stride. The received input data values are then stored at the determined addresses in the buffer for retrieval for processing in the layer.