Dynamic Code Allocation Heterogeneous Computing
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Solution Overview
Problem
There is a need to dynamically delegate parts of a computer program for execution by one or more co-processors in a heterogeneous multi-architecture computing system, to improve performance metrics such as latency and throughput.
Innovation Solution
The system dynamically configures a calling processing unit and a target processing unit by identifying a calling block and a target block in an intermediate representation of the software program, generating executable instructions for each block, and executing them on the respective processing units, allowing for dynamic delegation of execution tasks to co-processors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If parts of a computer program are statically assigned to specific processing units, then the system structure is simple and easy to manage, but the system cannot adapt to different computation workloads and performance requirements
Solution Approach 1:
The patent implements dynamic task delegation where the primary processing unit can delegate portions of computer programs to co-processors at runtime based on workload characteristics. The system transitions from static assignment to dynamic allocation, allowing processing units to be reassigned based on real-time performance requirements and computation types.
Solution Approach 2:
The patent creates a universal processing system where the primary processing unit can handle both general-purpose computations and specialized tasks by dynamically delegating to co-processors. The system architecture allows any processing unit to serve multiple functions depending on the computation workload, increasing versatility without requiring dedicated hardware for each task type.
2Productivity
If computation tasks are executed on a single processing unit, then the system architecture is simple, but the performance throughput and latency are limited
Solution Approach 1:
The patent segments computation tasks into portions that can be executed by different processing units simultaneously. The primary processing unit divides computer programs into delegatable portions and executes them on appropriate co-processors, enabling parallel execution and increasing overall system throughput without requiring a completely complex multi-processor architecture.
Solution Approach 2:
The patent introduces a task delegation mechanism that acts as an intermediary between the primary processing unit and co-processors. This mediator manages the allocation and coordination of computation tasks, allowing multiple processing units to work together efficiently while maintaining a relatively simple system architecture through centralized task management.
3Productivity
If co-processors are used to offload computation tasks, then the system performance improves, but the system complexity and difficulty of task management increase
Solution Approach 1:
The patent implements a self-service mechanism where the primary processing unit automatically identifies suitable co-processors and delegates appropriate computation tasks without external intervention. The system autonomously manages task allocation based on workload characteristics and processor capabilities, reducing the operational burden on users while maintaining high performance.
Solution Approach 2:
The patent incorporates feedback mechanisms where the system monitors computation workload characteristics and performance metrics, then uses this information to dynamically adjust task delegation decisions. This feedback loop enables the system to optimize performance automatically while simplifying management through data-driven decision-making about task allocation.
Data Source
AI summary
An apparatus for executing a software program, comprising processing units and a hardware processor adapted for: in an intermediate representation of the software program, where the intermediate representation comprises blocks, each associated with an execution block of the software program and comprising intermediate instructions, identifying a calling block and a target block, where the calling block comprises a control-flow intermediate instruction to execute a target intermediate instruction of the target block; generating target instructions using the target block; generating calling instructions using the calling block and a computer control instruction for invoking the target instructions, when the calling instructions are executed by a calling processing unit and the target instructions are executed by a target processing unit; configuring the calling processing unit for executing the calling instructions; and configuring the target processing unit for executing the target instructions.