Dynamic Comparator ADC With Internal References for Low Static Power

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Solution Overview

Problem

Existing analogue-to-digital converters (ADCs) face challenges in achieving low power consumption while maintaining high speed and bandwidth, particularly in low-resolution applications, due to high static power consumption in preamplifier chains and reference ladders, which is exacerbated by stringent requirements in emerging wireless sensor applications like multi-band OFDM and UWB systems.

Innovation Solution

The design incorporates at least two voltage comparator devices that generate their own internal voltage references, utilizing a dynamic regenerative structure with intentional transistor imbalances and switchable capacitors for calibration, allowing for low power consumption and efficient offset compensation, thereby reducing static power dissipation and improving accuracy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If traditional flash ADC architecture is used, then high conversion speed and low latency are achieved, but static power consumption increases due to preamplifier chain and reference resistive ladder

Engineering Contradiction:
Improveconversion speedVSAvoidstatic power consumption
Core Design Contradiction:
SpeedVSUse of energy by stationary object

Solution Approach 1:

The patent extracts and removes the static power-consuming reference resistive ladder from the traditional flash ADC architecture. Instead of using a continuous reference voltage ladder, the invention generates reference voltages dynamically only when needed for conversion, eliminating the static power dissipation associated with maintaining the reference ladder during idle periods.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent implements periodic action by using dynamic reference voltage generation that is activated only during conversion cycles. The reference voltages are generated on-demand rather than being continuously maintained, allowing the system to consume power only when conversions are performed, thus reducing average static power consumption while maintaining high conversion speed when active.

Inventive Principle:
Principle #19Periodic action

2Use of energy by stationary object

If low-resolution ADC is implemented, then power consumption is reduced, but measurement precision deteriorates

Engineering Contradiction:
Improvepower consumptionVSAvoidresolution accuracy
Core Design Contradiction:
Use of energy by stationary objectVSMeasurement precision

Solution Approach 1:

The patent applies parameter changes by dynamically adjusting the reference voltage levels based on the input signal characteristics and conversion requirements. This allows the ADC to maintain high measurement precision across different resolution requirements while consuming minimal power, as the reference voltages are optimized for each specific conversion rather than maintaining fixed high-precision reference levels continuously.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent implements self-service through automatic calibration and adaptation mechanisms that allow the ADC to optimize its own performance parameters. The system automatically adjusts its operating parameters to achieve the required measurement precision for each conversion task, eliminating the need for continuous high-power reference voltages and enabling low-power operation while maintaining accuracy when needed.

Inventive Principle:
Principle #25Self-service

3Use of energy by stationary object

If dynamic regenerative structure is used, then static power consumption is reduced, but device complexity increases due to calibration requirements

Engineering Contradiction:
Improvestatic power consumptionVSAvoidcalibration circuit complexity
Core Design Contradiction:
Use of energy by stationary objectVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by performing calibration of the dynamic regenerative structure during manufacturing or initial setup, storing the calibration data in non-volatile memory. This preliminary calibration eliminates the need for continuous complex calibration circuits during operation, as the calibration parameters are pre-determined and applied automatically, thus reducing both static power consumption and operational device complexity.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses copying by storing calibration results in memory and replicating their use across multiple conversion cycles. Instead of implementing complex real-time calibration circuits, the system copies the pre-stored calibration data and applies it repeatedly, significantly simplifying the operational device complexity while maintaining the low static power consumption benefits of the dynamic regenerative structure.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS7773010B2A/D converter comprising a voltage comparator device
Publication Date: 2010.08.10 INTERUNIVERSITAIR MICRO ELECTRONICS CENT (IMEC VZW)
  • US7773010B2 patent drawing
  • US7773010B2 patent drawing
  • US7773010B2 patent drawing

AI summary

The present invention is related to an analogue-to-digital (A/D) converter comprising at least two voltage comparator devices. Each of the voltage comparator devices is arranged for being fed with a same input signal and for generating an own internal voltage reference. The two internal voltage references are different. Each voltage comparator is arranged for generating an output signal indicative of a bit position of a digital approximation of said input signal.