Dynamic Controller Selection for Multi-IC Data Processing

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In information processing apparatuses with multiple integrated circuits, using a high-speed second controller for all data processing can disrupt other processing tasks, leading to inefficiencies.

Innovation Solution

An information processing apparatus is designed with a first integrated circuit for initial data processing, a second integrated circuit with higher processing speed for specific tasks, and a third integrated circuit that dynamically adjusts which controller is used based on the communication speed of connected devices, optimizing resource allocation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the second controller with higher processing speed is used for all data processing from connected devices, then data processing speed is improved, but other processing tasks performed by the second controller are disturbed

Engineering Contradiction:
Improvedata processing speedVSAvoidother processing stability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent segments the controller resources into two distinct types: a first controller for basic control functions and a second controller for high-speed data processing. This segmentation allows each controller to be optimized for its specific function, preventing the second controller from being disturbed by general control tasks while still providing high-speed processing when needed.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic selection logic that automatically determines whether to use the first or second controller based on the communication speed of the connected device. When a high-speed device is detected, the second controller is activated for data processing; otherwise, the first controller handles the processing. This dynamic adaptation ensures optimal performance while maintaining system stability.

Inventive Principle:
Principle #15Dynamics

2Reliability

If the first controller is used for all data processing, then system stability is maintained, but processing speed is limited

Engineering Contradiction:
Improvesystem stabilityVSAvoidprocessing speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent creates a universal controller selection mechanism that can adaptively choose between two different controller types based on system needs. The selection logic serves as a multi-functional interface that routes data processing tasks to the appropriate controller, allowing the system to maintain stability through the first controller while achieving high-speed processing through the second controller when conditions permit.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Productivity

If multiple integrated circuits with different processing speeds are provided, then processing capability is enhanced, but device complexity increases

Engineering Contradiction:
Improveprocessing capabilityVSAvoidcontroller configuration complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements a self-service selection mechanism where the system automatically determines which controller to use based on the communication speed of the connected device. The selection logic monitors device characteristics and autonomously routes data processing to the appropriate controller without requiring manual configuration or complex external control, thereby reducing system complexity while maintaining enhanced processing capability.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS11546485B2Information processing apparatus and semiconductor device
Publication Date: 2023.01.03 FUJIFILM BUSINESS INNOVATION CORP
  • US11546485B2 patent drawing
  • US11546485B2 patent drawing
  • US11546485B2 patent drawing

AI summary

An information processing apparatus includes a first integrated circuit including a first controller that processes data acquired from a device and that controls an operation of the device; a second integrated circuit including a second controller with a higher processing speed than a processing speed of the first controller; and a third integrated circuit including a first connection unit connectable to the device. The third integrated circuit includes a second connection unit connectable to the first integrated circuit, a third connection unit connectable to the second integrated circuit, and a setting unit that, when the device is connected to the first connection unit, sets an integrated circuit to be connected, in accordance with a communication speed of the connected device.