Dynamic Core Migration for Sequential Program Cache Optimization

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Solution Overview

Problem

Sequential programs on multi-core processors often fail to utilize multiple cores effectively, leading to performance limitations and wasted hardware due to their sequential execution nature, which results in inefficient use of resources and increased cache misses.

Innovation Solution

Implementing a helper thread that monitors data access patterns to dynamically migrate the execution of sequential programs across multiple cores, optimizing data distribution and computation based on phase transitions to reduce cache misses and utilize idle hardware.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If sequential programs are executed on multi-core processors using traditional single-core execution models, then program execution simplicity is maintained, but hardware utilization efficiency deteriorates and performance is limited

Engineering Contradiction:

Improveprogram execution performanceVSAvoidhardware utilization efficiency

Core Design Contradiction:

ProductivityVSAdaptability or versatility

Solution Approach 1:

The patent implements dynamic migration of sequential programs between different cores based on runtime conditions. The system monitors cache performance metrics and automatically relocates program execution to optimize hardware utilization while maintaining sequential program correctness, resolving the contradiction between execution performance and hardware utilization efficiency

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The system changes the execution parameter from fixed single-core assignment to dynamic multi-core distribution. By monitoring cache miss rates and other performance parameters, the system adjusts the core assignment in real-time to optimize both performance and hardware utilization, transforming the rigid execution model into an adaptive one

Inventive Principle:

Principle #35Parameter changes

2Productivity

If sequential programs are restricted to single-core execution, then execution model simplicity is preserved, but cache miss rates increase and performance deteriorates

Engineering Contradiction:

Improveprogram execution speedVSAvoidcache hit rate

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The patent implements a feedback mechanism that monitors cache performance metrics during program execution. Based on this feedback, the system dynamically adjusts core assignment decisions to optimize cache hit rates. The feedback loop continuously measures performance, compares it against thresholds, and triggers migration actions when optimization opportunities are detected

Inventive Principle:

Principle #23Feedback

Solution Approach 2:

The system performs preliminary analysis of program characteristics and cache access patterns before making migration decisions. By predicting which programs are likely to benefit from multi-core execution and preparing migration strategies in advance, the system optimizes cache utilization while maintaining execution speed

Inventive Principle:

Principle #10Preliminary action

3Adaptability or versatility

If multiple cores are provided for parallel processing, then hardware capability is enhanced, but resource waste occurs when insufficient tasks are available to utilize all cores

Engineering Contradiction:

Improveparallel processing capabilityVSAvoidhardware resource waste

Core Design Contradiction:

Adaptability or versatilityVSLoss of energy

Solution Approach 1:

The patent enables a single sequential program to serve multiple execution contexts across different cores. The same program can be dynamically assigned to different cores based on workload conditions, allowing the hardware to be universally utilized for sequential program execution rather than requiring separate parallelized versions of programs

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system implements self-service through automatic program migration decisions based on runtime monitoring. The execution environment autonomously determines optimal core assignments without external intervention, enabling the hardware to self-optimize its utilization based on current workload conditions and program characteristics

Inventive Principle:

Principle #25Self-service

Data Source

PatentUS9940170B2Dynamically managing distribution of data and computation across cores for sequential programs

Publication Date: 2018.04.10 MERCURY KINGDOM ASSETS LIMITED

AI summary

Technologies are generally provided for dynamically managing execution of sequential programs in a multi-core processing environment by dynamically hosting the data for the different dynamic program phases in the local caches of different cores. This may be achieved through monitoring data access patterns of a sequential program initially executed on a single core. Based on such monitoring, data identified as being accessed by different program phases may be sent to be stored in the local caches of different cores. The computation may then be moved from core to core based on which data is being accessed, when the program changes phase. Program performance may thus be enhanced by reducing local cache miss rates, proactively reducing the possibility of thermal hotspots, as well as by utilizing otherwise idle hardware.