Dynamic Processor Core Management for Storage Power Savings

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Solution Overview

Problem

High-capacity data storage systems face inefficiencies in power consumption as lightly utilized and fully utilized processor cores consume similar amounts of power, leading to suboptimal energy usage and potential performance issues due to unnecessary core activation.

Innovation Solution

Dynamic adjustment of active processor cores based on varying IO workloads to maintain acceptable IO latency, disabling cores when not needed to reduce power consumption while ensuring performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If all processor cores are kept active to handle peak workloads, then IO processing capacity is maximized, but power consumption increases unnecessarily during low-workload periods

Engineering Contradiction:
ImproveIO processing capacityVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The system dynamically adjusts the number of active processor cores based on current workload conditions. The controller monitors IO workload levels and enables or disables processor cores accordingly, transitioning the system from a static all-cores-active state to a dynamic configuration that adapts to varying workload demands, thereby reducing power consumption during low-workload periods while maintaining sufficient processing capacity during peak periods

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the operational parameter of processor core activation status based on workload thresholds. When IO workload falls below a predetermined threshold, the controller disables excess processor cores; when workload exceeds the threshold, the controller enables additional cores. This parameter change approach allows the system to optimize the balance between processing capacity and power consumption by adjusting core activation states

Inventive Principle:
Principle #35Parameter changes

2Use of energy by moving object

If processor cores are disabled to reduce power consumption, then power savings are achieved, but IO latency may increase if too many cores are deactivated

Engineering Contradiction:
Improvepower consumptionVSAvoidIO latency
Core Design Contradiction:
Use of energy by moving objectVSLoss of time

Solution Approach 1:

The controller implements a feedback mechanism that continuously monitors IO workload levels and adjusts processor core activation accordingly. By comparing current workload against predetermined thresholds and dynamically enabling or disabling cores based on this feedback, the system maintains IO latency within acceptable ranges while optimizing power consumption, avoiding both excessive power usage and unacceptable latency increases

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11720164B1Achieving power savings and low latency for storage
Publication Date: 2023.08.08 DELL PROD LP
  • US11720164B1 patent drawing
  • US11720164B1 patent drawing
  • US11720164B1 patent drawing

AI summary

A data storage system with multi-core processors dynamically enables and disables processor cores in order to manage power consumption while maintaining performance. One or more active processor cores are disabled responsive to determining that the current workload can be serviced with fewer active processor cores than are currently enabled while maintaining performance. One or more inactive processor cores are enabled responsive to determining that the current workload cannot be serviced with the currently active processor cores while maintaining performance. Separate utilization thresholds may be implemented for enabling inactive processor cores and disabling active processor cores to promote stability.