Dynamic Current Blanking in Switching Regulator Sense Circuits
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Solution Overview
Problem
Traditional current blanking circuits in switching regulators face challenges in maintaining accurate duty cycles and pulse widths due to variations in process and temperature conditions, and occupy significant silicon area, making them inefficient and difficult to implement effectively.
Innovation Solution
A current sensing technique that uses a buffer to dynamically track the gate drive signal and suppress initial transient spikes, allowing the sense switch to turn on only after the spike has occurred, thereby reducing blanking time and silicon area requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional current blanking circuits are used to blank out initial transient spikes, then voltage regulation is improved, but duty cycle accuracy and pulse width control deteriorate due to fixed blanking time
Solution Approach 1:
The patent implements dynamic current blanking by using a buffer to generate a delayed version of the gate drive signal, allowing the blanking time to automatically adjust with process and temperature variations. The sense switch is enabled only after the buffer output transitions, creating a dynamic blanking window that adapts to operating conditions rather than using a fixed predetermined time.
Solution Approach 2:
The patent changes the timing parameter dynamically by using the buffer's propagation delay characteristics. The blanking duration is determined by the buffer's response time to the gate drive signal edge, which naturally varies with process and temperature. This parameter change approach allows the blanking time to optimize itself across different operating conditions.
2Reliability
If predetermined current blanking time is used to cover gate driver delay and amplifier settling, then transient spike suppression is improved, but silicon area increases due to delay units and blanking switches
Solution Approach 1:
The patent extracts the blanking function from a separate delay unit and blanking switch circuitry, and instead integrates it into the existing gate drive path using a buffer. The buffer's inherent delay characteristic is repurposed to create the blanking window, eliminating the need for dedicated delay generators and output blanking switches, thereby reducing silicon area.
Solution Approach 2:
The buffer serves multiple functions: it drives the sense FET gate, provides the blanking time through its propagation delay, and enables the sense switch at the appropriate moment. This multi-functionality consolidates what would traditionally require separate dedicated circuits into a single component, reducing overall circuit complexity and area.
3Loss of time
If traditional current blanking circuit is implemented to reduce leading edge spike impact, then amplifier settling time is improved, but device complexity increases due to additional delay units and blanking switches
Solution Approach 1:
The patent merges the blanking function with the gate drive signal path by using a buffer to generate the sense FET gate signal. The same buffer that drives the sense FET also inherently provides the blanking function through its propagation delay, combining what would traditionally be separate functions into a unified circuit approach.
Solution Approach 2:
The buffer automatically provides the blanking function through its inherent propagation delay characteristics without requiring external control. The delay unit and blanking switch are eliminated because the buffer's natural response time creates the necessary blanking window, making the circuit self-regulating rather than requiring additional control logic.
Data Source
AI summary
In a method and system for sensing current in a switching regulator (SWR) operating in a current mode, a power switch is coupled to receive the current from a switching element, the power switch being controlled by a gate signal. An inrush of the current causes an initial transient spike (ITS). A buffer having a buffer input and a buffer output is coupled to receive the gate signal and provide a buffered gate signal. The buffer output is disabled during the ITS. A sense switch (SW) is coupled to receive a portion of the current from the switching element, the SW being turned on by the buffered gate signal after the initial transient spike. A sense resistor (SR) is coupled to receive the portion of the current from the SW. An amplifier converts the portion of the current through the SR to a voltage signal for controlling the SWR.