Dynamic Current Budget Management for Memory Subsystems

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current peak power management systems in memory sub-systems face challenges in efficiently managing power consumption during high peak current usage, leading to limitations in concurrently operating multiple memory dies due to static data path operation current budget reservation schemes that result in wasted resources and reduced memory array operation performance.

Innovation Solution

Implementing dynamic data path operation current budget management through an application-specific integrated circuit (ASIC) that dynamically assigns and releases current budget for incoming data path operations, using status register bits to determine readiness and optimize current allocation, and maintaining peak power states to handle bus events efficiently.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If static data path operation current budget reservation schemes are used, then power consumption during high peak current usage is managed, but resource waste occurs and memory array operation performance is reduced

Engineering Contradiction:
Improvepower consumption efficiencyVSAvoidmemory array operation performance
Core Design Contradiction:
Loss of energyVSProductivity

Solution Approach 1:

The patent implements dynamic current budget management where the controller adjusts current budget allocation for data path operations based on real-time system state. Instead of static reservation, the system dynamically determines available current budget by monitoring power consumption thresholds and adjusting operational parameters, enabling both energy efficiency and maintained performance through adaptive resource allocation

Inventive Principle:
Principle #15Dynamics

2Power

If current budget is reserved for data path operations, then peak power management is achieved, but wait times for current budget increase

Engineering Contradiction:
Improvepeak power managementVSAvoidwait times for current budget
Core Design Contradiction:
PowerVSLoss of time

Solution Approach 1:

The system employs feedback mechanisms where the controller continuously monitors power consumption, operational state, and current budget utilization. Based on this feedback, the controller dynamically adjusts current budget allocation and operational timing, allowing memory operations to proceed with minimal wait times while maintaining peak power management through real-time adaptive control

Inventive Principle:
Principle #23Feedback

3Productivity

If multiple memory dies operate concurrently, then system bandwidth is improved, but peak current usage increases

Engineering Contradiction:
Improvesystem bandwidthVSAvoidpeak current usage
Core Design Contradiction:
ProductivityVSPower

Solution Approach 1:

The patent utilizes parameter changes by dynamically adjusting operational parameters such as voltage levels, clock frequencies, and current budget allocations based on the number of concurrently operating memory dies. The controller modifies these parameters in response to system state, enabling multiple dies to operate concurrently at optimized power levels that maintain high bandwidth while controlling peak current consumption through adaptive parameter adjustment

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20240152295A1Peak power management with dynamic data path operation current budget management
Publication Date: 2024.05.09 MICRON TECHNOLOGY INC
  • US20240152295A1 patent drawing
  • US20240152295A1 patent drawing
  • US20240152295A1 patent drawing

AI summary

A memory device includes a plurality of memory dies, each memory die of the plurality of memory dies including a memory array and control logic, operatively coupled with the memory array, to perform operations including identifying a data path operation with respect to the memory die. The memory die is associated with a channel. The operations further include determining, based on at least one value derived from a current budget ready status and a cache ready status, whether the channel is ready for the memory die to handle the data path operation, and in response to determining that the channel is ready for the memory die to handle the data path operation, causing the data path operation to be handled by the memory die.