Dynamic Data-Link Bandwidth Switching With Precalibrated Links
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Solution Overview
Problem
Conventional computing devices face challenges in balancing high performance data transfers with low power consumption, particularly in systems that switch between different power modes, leading to latency issues due to uncalibrated and terminated signaling, which is not suitable for applications with strict quality of service requirements.
Innovation Solution
Dynamically enabling and disabling individual control and data links, maintaining the same signaling rate across bandwidth modes, and calibrating disabled links to minimize latency and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If calibrated and terminated signaling is employed to meet stricter timing requirements for higher signaling rates, then data transfer performance is improved, but latency increases significantly (300 nanoseconds or longer) during mode transitions
Solution Approach 1:
The patent performs calibration actions in advance by maintaining calibration data in a buffer before mode transitions are needed. The system pre-calibrates links during stable operating conditions so that when rapid switching is required, the calibration is already ready, eliminating the 300+ nanosecond latency penalty associated with performing calibration during transitions.
Solution Approach 2:
The patent introduces calibration data buffers as intermediary storage elements that hold calibration information between calibration operations and actual link usage. This intermediary mechanism allows the system to decouple the calibration process from the data transmission process, enabling rapid mode switching without waiting for time-consuming recalibration operations.
2Productivity
If wider data busses are used to achieve higher data transfer speeds, then bandwidth is improved, but power consumption increases and integrated circuit sizes increase
Solution Approach 1:
The patent implements dynamic adjustment of data bus width based on actual performance requirements. The system can switch between different bus widths (e.g., 8-bit, 16-bit, 32-bit) depending on whether high bandwidth operations are currently needed. This dynamic approach allows the system to maintain high performance when required while reducing power consumption during normal operation, avoiding the need to continuously operate at maximum bandwidth.
3Loss of time
If uncalibrated and terminated signaling is used for quick switching between data transfer rates, then latency is reduced, but timing requirements for higher signaling rates are not met
Solution Approach 1:
The patent performs calibration actions in advance by maintaining calibration data in a buffer before mode transitions are needed. The system pre-calibrates links during stable operating conditions so that when rapid switching is required, the calibration is already ready, eliminating the 300+ nanosecond latency penalty associated with performing calibration during transitions.
Solution Approach 2:
The patent introduces calibration data buffers as intermediary storage elements that hold calibration information between calibration operations and actual link usage. This intermediary mechanism allows the system to decouple the calibration process from the data transmission process, enabling rapid mode switching without waiting for time-consuming recalibration operations.
Data Source
AI summary
Bandwidth for information transfers between devices is dynamically changed to accommodate transitions between power modes employed in a system. Bandwidth is changed by selectively enabling and disabling individual control links and data links that carry information. During a highest bandwidth mode for the system, all of the data and control links are enabled to provide maximum information throughout. During lower bandwidth modes for the system, at least one data link and/or at least one control link is disabled to reduce the power consumption of the devices. At least one data link and at least one control link remain enabled during each low bandwidth mode. For these links, the same signaling rate is used for both bandwidth modes to reduce latency that would otherwise be caused by changing signaling rates. Also, calibration information is generated for disabled links so that these links may be quickly brought back into service.