Dynamic Data Mapping Circuit for Semiconductor Storage Efficiency
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Solution Overview
Problem
In semiconductor systems, the parity storage region is often not utilized efficiently due to its fixed capacity, leading to suboptimal use of storage space when ECC mode is enabled, as data and parity are stored in separate regions without flexibility in mapping.
Innovation Solution
A semiconductor system with a fail information generator to detect data fail addresses, a data mapping circuit to change the mapping table, and a data mapper to transmit data from data storage regions to parity storage regions, allowing for efficient use of parity storage space by replacing data with parity in unused parity storage areas.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If data and parity are stored in separate fixed regions, then storage structure is simple, but parity storage region is not utilized efficiently
Solution Approach 1:
The patent implements dynamic mapping between data storage regions and parity storage regions through a mapping table. The data mapper dynamically determines whether to store data or parity in each region based on the mapping table, allowing the system to adapt storage allocation to actual usage patterns rather than using fixed static regions. This resolves the contradiction by making the storage structure flexible while maintaining operational simplicity.
Solution Approach 2:
The patent enables parity storage regions to serve dual purposes: storing parity information when needed and storing data when parity storage capacity is not fully utilized. The mapping table logic and data mapper allow the same physical storage regions to function as either data regions or parity regions dynamically, increasing overall storage utilization efficiency while maintaining the simple separate-region structure.
2Quantity of substance
If parity storage region capacity is increased to match data storage growth, then data storage capacity is improved, but storage space is wasted when ECC mode is not fully utilized
Solution Approach 1:
The system dynamically adjusts the effective capacity of parity storage regions based on actual ECC utilization needs. When ECC mode is enabled and parity storage is needed, the mapping table directs data to alternate regions while utilizing parity regions for their intended purpose. When ECC mode is not utilized, the mapping table can redirect previously reserved parity space to data storage, eliminating waste while maintaining the physical infrastructure for future ECC needs.
Solution Approach 2:
The patent changes the functional parameter of storage regions from fixed to variable. The mapping table logic dynamically modifies which regions serve as data regions versus parity regions based on operational mode and utilization patterns. This allows the system to scale effective storage capacity up or down without physical changes, matching data storage capacity needs while preventing space waste.
3Loss of energy
If mapping table is updated frequently to optimize storage allocation, then storage efficiency is improved, but access time increases
Solution Approach 1:
The system performs preliminary actions by pre-establishing the mapping table with initial data-parity region assignments before actual storage operations begin. The mapping table is configured in advance to reflect the storage architecture and ECC requirements. During normal operation, the data mapper uses this pre-configured mapping table without requiring frequent updates, thus maintaining high storage efficiency while minimizing access time overhead. Updates occur only when necessary, such as when ECC mode status changes.
Data Source
AI summary
A semiconductor system may be provided. The semiconductor system may include a fail information generator and a data mapping circuit. The fail information generator may detect a data fail address of a data storage region. The data mapping circuit may change a mapping table based on the data fail address, and transmit data to be stored at the data fail address in the data storage region, to a parity storage region.